New Audio-gd R-7, R-7HE R-8, R-27, R-27HE, R-28 Flagship Resistor Ladder DACs and DAC/amps
Oct 25, 2019 at 1:29 AM Post #5,313 of 11,260
I see a clock output as well, which as I have guessed, means it can be connected to the clock input of the DAC ?? Though it has to output 10M as well. Not sure if that is the case.

Don't know for sure but from the start Kingwa listed: "Set whether the clock output interface output is BCK signal or MCLK signal"

/Jan
 
Oct 25, 2019 at 4:58 AM Post #5,314 of 11,260
Don't know for sure but from the start Kingwa listed: "Set whether the clock output interface output is BCK signal or MCLK signal"

/Jan
Anyway, the best way to used both inputs will by to feed the same 10M signal from an ultra-stable external source.

Feeding the dac with the actual word or bit clock associated to the data rate from the ddc could of course be done if the dac's fw supports this option. It would then have to told this is what is inputted or perhaps automatically detect it.
 
Oct 25, 2019 at 10:43 AM Post #5,315 of 11,260
I tried the Parallel_DOP update on my R-28 (2019). It failed. Any ideas why? The program seemed to find the FPGA alright - it looks just like in Kingwa's installation instruction, only that it failed just a couple of seconds after pushing the Start button (text "Failed" in the Progress cell).

Two possible sources - I never got a prompt to "Perform automatic web license retrieval". But the program just worked anyway. Also, the 10-pole blaster contact couldn't be pushed all the way down in the DAC end to "click". But still, the software seemed to find the chip.
 
Oct 25, 2019 at 11:12 AM Post #5,316 of 11,260
@Einar First verify if the JTAG programming pod (blaster) is connected correctly. Not using the same Altera software but find 'Tools' in the top pulldown menu and select 'JTAG Chain Debugger'. When this window opens press 'Test JTAG Chain'. This will perform a simple loop through test of the 10-pin JTAG connection to the FPGA and back. You should get a green thumbs up message or red failure. Usually I have the 10-pin connector backward or a row off if this fails.

The DAC has to have power on the reprogram the FPGA and perform this test. If you have a licensing issue then a popup will tell you so.
 
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Oct 26, 2019 at 2:38 AM Post #5,318 of 11,260
DACLadder Thank you for the advice. I had indeed no connection to the Cyclone. What actually ended up working is switching places of the connectors... the 10-pole connector end I used in the DAC, I put in the USB Blaster instead and vice versa. Not sure why that would matter, but hey, it worked...!

My sound chain is Mac Mini 2014 as DLNA server on Audirvana (Tidal Hifi) and SoTM sms-200 ultra neo as DLNA endpoint, connected to the R-28 via USB (AntiCables Level 3.1). My impression of the Parallel_DOP upgrade is a bit more effortless presentation of midrange/treble, if that makes any sense. More easy on the ears (and it certainly wasn't bad before).
 
Oct 26, 2019 at 5:26 AM Post #5,320 of 11,260
Turdski I'm not sure what the previous firmware version was. I received my R-28 in mid August this year, so I guess it was whatever was the newest back then.

Note of potential interest: I ran the Quartus FPGA software in a virtual machine of Windows 7 Professional in VMWare Fusion 10.1.1 on a MacBook Pro (late 2011) running macOS High Sierra (10.13.6). Worked like a charm :slight_smile:
 
Oct 26, 2019 at 11:29 AM Post #5,324 of 11,260

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