[t52]

Quote:

Originally Posted by ezkcdude I'm not a guru, for sure, but I have been told that right angles in traces should be avoided.

seems to be mostly based on word-of-mouth. some time ago i found a good article on right angle vs. 45° vs. round corners in pcb traces, it's here:
http://www.montrosecompliance.com/Te...ners-Japan.pdf

according that article and based on my experience (taking into account that 20mhz corresponds to a wavelength of 15m), with corners in traces of a total length ~30mm there should be hardly any difference betwenn 90° and 45° angles. the "angled" part in 45° corners is likely to much shorter than 5mm, this probably is as "hard" for 15m wavelengths as a 90° corner...

has anybody observed something different (not just heard of)? i want to be convinced

 

[t52]

the digital board is finished in revision 1

here are the pics:

schematics:

top:

bottom:

up next:

1. clock board with low noise xo and 3.3V ttl converter/100ohm capable driver
   does anybody know a good 24MHz driver, should i go for a video opamp?
2. i/v conversion board, no real plans here up to now, lots of reading... probably will go for something very simple for the first try...

 

[00940]

For the 45 vs 90 debate :

Quote:

When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its normal width (see Figure 7). This upsets the transmission line characteristics, especially the distributed capacitance and self-inductance of the trace, resulting in the reflection. It is a given that not all PCB traces can be straight, so they will have to turn corners. Most CAD systems give some rounding effect on the trace; sharp 90º traces are a relic of the “tape-up” days of PCB layout. The rounding effects of CAD programs, however, still do not maintain constant width as the trace rounds the corner. Figure 7 shows progressively better techniques of rounding corners. Only the last example maintains constant trace width and minimizes reflections. Most CAD programs support these methods, but they can entail a little more work to master.

Taken from "The PCB is a component of op amp design", TI application note slyt166

 

[t52]

ok, i'll try to smooth things out in a next step... the bottom half regulators could all move a little more to the right etc...

my biggest problem is the distribution of the i2s lines and clock from the cs8421 to the 2 dac chips, i have vias and 90° corners on there, not very optimal... can't see a real better way to do it though... anybody?

 

[Garbz]

I would be more worried about via inductance then 90degree corners. It seems have of the RF engineers you talk to say things either way. Some say they are plague, and some just ask what electrons like racing cars travel so fast they can't turn corners.

A good compromise would be to make the corner 45degrees but only enough so no hard point is generated in the corner.

It is probably still a good idea to place a split in the groundplane as per http://www.hottconsultants.com/techt...gnd-plane.html. Although once again some RF engineers say bollocks to that.

 

[t52]

regarding the partitioning of groundplanes...
for the signal lines that sounds very reasonable, 3 questions still:

• what about dc return currents? if i do the star wiring of dc lines like in the previous layout, the dc currents in the ground will also flow between groundplane partitions (back to the psu gnd connection) above the digital signal lines, right? is this desireable?
• i guess the regulators for each chip should sit on the same groundplane partition as the chip?! this way the supply bypassing caps before and after the regulators would shunt hf currents to the local groundplane partition (imho
  
  )...
• what about the output side of the dac? i can keep groundplanes seperate there up to the output jack only, then the grounds have to be merged again. should i put two ferrites in the ground.connection before the output jack to decouple these hf-wise?

anyways i guess i will rip up this whole thing and start fresh...

 

[Garbz]

1. DC will take the path of least inductance. One fundemental condition for this to work is that the powersupply supplying the analogue side of the DAC is separate from the digital side. If the regulators are driven by the same electrical net then bring 2 in on the board, one for the digital regulators one for the analogue.

The goal here is to keep the digital return currents away from the analogue ones where it can be effected. All the way back before the regulator this is no longer a problem.

2. Very corrent

3. The grounds should be merged where digital meets analogue so right under the DAC chip. This keeps the final digital currents on the digital side and the analogue currents on the analogue side.

One thing is certain and despite being done in many DAC do NOT use an rf bead or any other form of inductor to couple ground planes together in a digital system. Suppose a digital signal does cross that inductor the ultra fast pulses cause a voltage drop / rise. I did see a picture of a DAC which had 8V difference between groundplanes because they used inductors to couple them together.

 

[t52]

Quote:

Originally Posted by Garbz 3. The grounds should be merged where digital meets analogue so right under the DAC chip. This keeps the final digital currents on the digital side and the analogue currents on the analogue side. One thing is certain and despite being done in many DAC do NOT use an rf bead or any other form of inductor to couple ground planes together in a digital system. Suppose a digital signal does cross that inductor the ultra fast pulses cause a voltage drop / rise. I did see a picture of a DAC which had 8V difference between groundplanes because they used inductors to couple them together.

think you misunderstood me... it's clear to me that the analog and digital groundplanes meet under the dac chips, well - here's the problem - i have two of them. if each dac chip has it's own groundplane partition, well then i have two analog groundplane partitions. somewhere these have to be connected as amp/preamp inputs typically only offer one ground connection, know what i mean?

 

[00940]

In your application I would go for a solid groundplane, without partitions. But you have then to take special care in laying out your boards by areas. Look at all the current loops and lay everything out so that digital and analog signals are as far apart as possible. Same for power supplies.

For this, don't be affraid of using a bigger pcb.

 

[Garbz]

The split plane idea is just an added safetybuffer if you wish. It is possible to layout things without it but with the split plane any signals that may have to travel to the other side now have a huge path which more often then not will no longer be the path of least inductance. Guido Tent may agree with you but he amongst others are experts who can layout something like this without much thought at all.

t52 now you have misunderstood me

. The idea of the groundplane partitions is to separate the digital and analogue sides. The analogue planes can ofcourse be joined together. What I am impling is a single slit cutting the board in half straight through both DAC chips, where under each DAC chip the ground plane connects together. Infact I am wondering if having a separate plane for each DAC won't infact cause a ground loop when you connect the following component.

 

[t52]

Quote:

Originally Posted by Garbz Infact I am wondering if having a separate plane for each DAC won't infact cause a ground loop when you connect the following component.

yep, it was the ground loop on the analog side i was afraid of

ok, i think i got it now and i'll go ahead and re-route that damn thing in the next days...

i already tried on the distribution of wclk/rlck/data lines from asrc to the dacs, here's a pic of it:

the cyan and purple hand-drawn lines represent jumper wires, the only way without jumpers i came up with up to now is the first attempt with 90° corners...
there are still 2 vias on each line, i can get rid of these if i put the lines on the top layer, but then they will cut up the groundplane - not very desireable, right?

 

[Garbz]

Indeed it's not. You could move the groundplane to the bottom too. This is the only reason why I like throughhole designs. In the end sometimes you need vias. E.g. the CS8416 has a different pin order then the PCM1730 on my DAC so one of the traces I had to run through some vias.

The only thing I can suggest is make the via as small as your PCB manufacturer will let you to reduce inductance.

 

[t52]

well, if i move the groundplane to the bottom, all ground connections of the chips have to go through vias as well as supply bypassing caps will have their gnd connection through vias. not very cool... placing the chips on the bottom too puts us in a vicous circle

having ground plane on top and on bottom layers seems odd to me :/

 

[t52]

i was bored with doing lyout work

so i came up with my first attempt on a very simple i/v conversion stage. the conversion is done by resistors, parallelled with capacitors to do some low-pass filtering. then there are four (optional) unity gain buffers and a summing amp at the output stage (gain=10). the buffers are sort of "to be tested", i just thought that these might be helpful, as all current outs see only the impedance of capacitor and resistor, not he summing amp's input resistance. this way the circuit could work "better balanced" (didn't know how to express that in a better way). these buffers are not difficult to leave out on a final pcb, just jumper in->out...
here's the pic:

hope to receive some comments, but please don't recommend tubes, transformers, no opamps etc. i want to have a simple approach first, then try all the other possibilites including true transimpedance amps (along the lines of jocko's i/v converter).

 

[ezkcdude]

Quote:

Originally Posted by t52 well, if i move the groundplane to the bottom, all ground connections of the chips have to go through vias as well as supply bypassing caps will have their gnd connection through vias. not very cool... placing the chips on the bottom too puts us in a vicous circle having ground plane on top and on bottom layers seems odd to me :/

What's wrong with having GND go through vias? It's not a signal line. How else would SMT components connect to internal GND planes in multi-layer boards, anyway? It seems to me your design will be a lot simpler if you dedicate the bottom side to a large ground plane.