Part two of Mark and Gordon's hard work is the XMOS "Star Clocking" Scheme. We hope you like it.
Software Design Team's Notes (2)
XMOS Programming – Star Clocking Scheme
There is the XMOS USB platform and there is iFi XMOS USB platform.
Inside the XMOS, there is a radical “Star-Clock” scheme in the iFi-XMOS implementation. This is a major departure from the traditional “Daisy Chain” clocking scheme provided originally by XMOS which many others use.
Why? On the stock XMOS USB platform, we were not 100% happy with the overall jitter level, especially with high-speed signals. Hence one of our senior software engineers, who has military defence programming experience, spent a few sleepless nights on the XMOS standard source code and discovered that the standard XMOS used a traditional “Daisy Chain” clocking scheme, which is perfectly fine for low-speed audio signals, but not the best topology for high-speed audio signals.
The reason he discovered this was he actually did his entire programming in Ada (yes, Ada) when he used to work for military projects.
(Ada
was named after Ada Lovelace (1815–1852), who is widely credited as being the first computer programmer)
For some background reading:
http://en.wikipedia.org/wiki/Ada_(programming_language)
One of the reasons (of course there are many other reasons too) for doing the military stuff in Ada is because of the real-time requirements (he once working on a targeting system for an air-to-air missile!)
So everything must be in real-time and must have zero-timing error. In other words, this guy is "super timing sensitive”.

After discovering this, he went on to redesign the whole clocking topology inside XMOS USB platform and utilised a “Star Clocking” scheme which he used before in the missile targeting system he was part of.
To put this into an audio context, parallels can be drawn from the JVC “K2” mastering grade clocking scheme below:
Inside the customised iFi-XMOS, just imagine “what if” all those internal XMOS software modules received their reference clocks from a single, ultra-low jitter master clock?
This is exactly what happens and improves the overall system jitter performance significantly and is easily audible as the attack and decay is better presented and everything is just more accurately executed.
Next time, Part 3: The Microprocessor.