New Audio-gd R-7, R-7HE R-8, R-27, R-27HE, R-28 Flagship Resistor Ladder DACs and DAC/amps
Sep 30, 2019 at 8:30 PM Post #5,057 of 11,260
@FredA. I’m confused as well and easy to do. R7-10M or new Di DDC?
Not sure what you mean, Scott.

The whole point i think is to use the same external clock to drive both the r7 and the new DI.

This means the 10Mhz input has to be added the r7. This can be done by changing fw on the input selection cplds, on the altera flga and on the mcu which drives the user interface (to be able to select the external clock). Kingwa will make these new fws available to us at some point. In the mean time, it will still be possible to feed our dacs with the new DI, and even using an external clock with it as we do with the u16.

The 10M dac input is the icing on the cake cause with it, taking for granted the clock signal will stay relatively clean up to the altera, no reclocking will be done by the altera, just clocking, which means the lowest possible jitter.
 
Sep 30, 2019 at 8:34 PM Post #5,058 of 11,260
Kingwa must have tested it and determined it was beneficial to sound quality. Quite easy to do, having all the needed components available and being able to adjust the fws to test the idea.
 
Sep 30, 2019 at 9:22 PM Post #5,060 of 11,260
The 10M dac input is the icing on the cake cause with it, taking for granted the clock signal will stay relatively clean up to the altera, no reclocking will be done by the altera, just clocking, which means the lowest possible jitter.

You bring up good points. Get both DDC (other sources) and DAC on same clock domain should be make for a much cleaner path. No PLLs. No asynchronous data alignment. I like the possibilities a lot!

I’m having a strange sense of deja vu... like “here we go again”!!
 
Sep 30, 2019 at 9:32 PM Post #5,061 of 11,260
Not sure what you mean, Scott.

The whole point i think is to use the same external clock to drive both the r7 and the new DI.

This means the 10Mhz input has to be added the r7. This can be done by changing fw on the input selection cplds, on the altera flga and on the mcu which drives the user interface (to be able to select the external clock). Kingwa will make these new fws available to us at some point. In the mean time, it will still be possible to feed our dacs with the new DI, and even using an external clock with it as we do with the u16.

The 10M dac input is the icing on the cake cause with it, taking for granted the clock signal will stay relatively clean up to the altera, no reclocking will be done by the altera, just clocking, which means the lowest possible jitter.
So does it mean that ideally there will be an external master clock that clocks both the DDC and the DAC at the same time as the master clock correct ? This has been done by the Sony exoteric CD players of the past that used an external DAC and masterclock, I think,
 
Sep 30, 2019 at 10:01 PM Post #5,062 of 11,260
So does it mean that ideally there will be an external master clock that clocks both the DDC and the DAC at the same time as the master clock correct ? This has been done by the Sony exoteric CD players of the past that used an external DAC and masterclock, I think,
All clock signals coming from the same source. If not contamined, this means jitter as low as that of the clock.
 
Sep 30, 2019 at 10:06 PM Post #5,063 of 11,260
You bring up good points. Get both DDC (other sources) and DAC on same clock domain should be make for a much cleaner path. No PLLs. No asynchronous data alignment. I like the possibilities a lot!

I’m having a strange sense of deja vu... like “here we go again”!!
Yep. Not sure if i need any upgrade the way my setup as been perfoming lately, but WTH.
 
Sep 30, 2019 at 10:16 PM Post #5,064 of 11,260
@FredA. Thanks Fred! I was wrongly jumping ahead of developments and thinking you had info on how to modify the R7. Take a deep breath... exhale....
Well i was actually echoing what Jan had posted. He seems to have talked to Kingwa. From what he wrote, there does not seem to have any hw change involved other than installing the proper input plug and and possible its corresponding cable. Unless Kingwa goes 75ohms, in whcih case there would be no hw change at all.
 
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Oct 1, 2019 at 12:25 AM Post #5,065 of 11,260
I just clicked. You mean all will be done through software, besides the fact that an spdif input has to be sacrificed to be used as a 50ohm clock input. Or 75 ohm. If so, i will likely get rid of the optical.

Or there are three other spdif inputs, so i suppose one of them could go. This is great news!

Yes Fred, correct.
/Jan
 
Oct 1, 2019 at 9:58 AM Post #5,066 of 11,260
I have been taking my time to enjoy the R7HE - not leaving it to burn in unattended... it's been here for a week and I'm astounded how good the DAC is with staging, separation and tonality.

i encountered a DSD playback bug with the latest Asy3 firmware, this was verified by the official AGD distributor here in Msia with the shop's R7 as well - detailed feedback has been sent to Kingwa, so hopefully he figures it out soon enough. In any case, I listen to mostly FLAC and TIDAL, so to be safe I have just put DSD playback in Roon to "convert to PCM" for now.

tonight's hours are passing by enjoyably with my LCD-3F playing tunes from the Sansui AU-7700 and R7HE. :)

Hola folks, Kingwa told me last night that he has a new firmware coming out this month based on "full new configure" ... hoping it addresses the bugs I reported to him back in August, but I guess it will also cater to the new gear / upgrades that he has planned. Looking forward to trying out the new firmware soon
 
Oct 1, 2019 at 10:14 AM Post #5,067 of 11,260
I think new FPGA firmware will reflect an architecture change from serial processing of I2S data streams to parallel processing. This will mean less noise on the FPGA power bus as parallel processing of data is done at much, much slower clock rates (inside the FPGA). And lower jitter is the goal. R7-10M seems further out in time (months). This is all rumor and conjecture.
 
Oct 1, 2019 at 4:59 PM Post #5,069 of 11,260
Thanks for the link Fred. Everything you guys stated appears true about the R7-10M! And seems to me to retrofit the standard R7 to external 10Mhz capability is just reprogramming the three parts mentioned - Altera DSP, Xilinx I/O CPLD, and the front panel MCU (may be replace the PROM). Pictures inside the chassis indicate same wiring and did not notice any new parts added. No soldering involved hopefully.

Kingwa explains the new FPGA (parallel processing) very well in the translated website. These are W-I-D-E parallel data buses. DSD is 64-bits wide for each the left and right channels! I2S dual 32-bit, S/PDIF dual 24-bit.
"The parallel mode only needs one clock to process the 32-bit data of the left and right channels, which greatly improves the processing speed and is less susceptible to clock stability. The IIS input data is immediately reassembled into dual 32-bit parallel data. The SPDIF signal is demodulated and sent to the next set of processing through dual 24-bit data. DSD data is also reassembled into dual 64-bit parallel data processing."

Input #3 BNC is the 10Mhz clock input. No longer functions as S/PDIF. (Later: May have to replace a resistor on main board to change impedance from 75 to 50 ohm. So don't put away the soldering iron).

The front panel really changes up and is new in the sense the button functions/numerical display have changed from the current product. But to select int/ext clocking you just set it on the new front panel. To retrofit may require some relabeling of the front panel button positions. But think I will not mess with that to keep the panel looking pristine. The front panel MCU change makes that all work.

Yeah, big changes coming to the R7 near you!
 
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