Kwak-Clock Mod

[Crowbar]

Thanks.

 

[colonelkernel8]

no problem. now, back to subject.

 

[peranders]

Quote:

Originally Posted by jarthel /img/forum/go_quote.gif Elso wasn't selling PCBs before. But 4 years ago, I decided to try out his design without a PCB. I used something called veroboard but it is still P2P. VERY VERY BAD experience with all kinds of distortion.

I have serious doubts about the performance of Elso's home brewed pcb. I don't doubt for a second that colonelkernel8 thinks it's good or even superior. I can bet some money that no professional would never come up with the idea to make a > 10 MHz circuit be built in the Elso way. We can see here and in other places students even are pretty good to make good pcb's with a little help from pros. We have seen rather many nice looking "professional" pcb's from non-pros. Only Elso can answer why he can't manage to make a professional pcb for that kind of money he sells his boards for. This was only a thought, nothing else.

 

[Crowbar]

And here comes peranders, undoubtedly soon to begin selling his own 'improved' version, as we've seen numerous times and on various forums. Was losing your moderator status at diyaudio not a lesson? Your continued style of attacking others' implementations, then stealing the designs and after a few 'improvements' selling them is getting old. In relation to high frequency design, I'd take Jocko Homo's opinion over most as he's done much work professionally with RF, and I've not heard any criticisms from him about Elso's work (including in my private discussion with him).

 

[peranders]

My "attacking" was a possible opening for design thoughts. Nothing is written in stone. VERO board is not a first choice if you are planning to make a high performance oscillator. Making an oscillator as good it can be requires more.

 

[Crowbar]

Surface mount boards are not hard to do and they're worth it. I strongly recommend every DIYer invest in a hot air setup. You can get a handheld hot air with a bunch of nozzles for about $120 including shipping, and it's useful to add a preheater (as low as $50, eBay it). If you're nuts about the best digital implementation, you can even get Teflon PCBs.

 

[peranders]

It works rather fine to use a regular soldering iron with a small tip plus a pair of tweezers.
This or this.
Tweezers, detail

If you have two soldering irons, good if you solder resistors and caps.

 

[colonelkernel8]

Well, I did manage to find a SMD version of the Kwak Clock on this very forum:

Its a start, but can be undoubtedly improved upon. This uses the soic packages of the regulators.

 

[Garbz]

A +10Mhz circuit without a ground plane... I suggest if you're going to go all out then make it dual layered and do a bit of reading from the likes of Guido Tent's and other HF engineers pcb design articles.

 

[colonelkernel8]

I didn't design that above pcb, if you will read what it says.

Elso's design had a ground plane btw.

 

[regal]

Quote:

Originally Posted by Crowbar /img/forum/go_quote.gif I call BS, and I can prove it: http://peufeu.free.fr/audio/extremist_dac/ There is also at least one other DIYer that did this, either from the headwize or diyaudio forums. The FIFO is actually a more complex option to properly implement, but has also been implemented (search diyaudio).

The extremist DAC is a Do-it-himself one off project that I saw last year, that no one else is building. Calling this DIY is like calling an EE for Esoteric a DIYer. Also check his updates, it never worked out and he never made more boards.

Believe me I would love to be wrong about this. There is a company who sells a DAC for $2000 and gives you the instructions to hack your transport. We should start a new thread though because I would like to hear more about this as it should be the ultimate in jitter reduction, surpassing any clock upgrade.

 

[Pars]

Take a look at the Tentlink on tentlabs site. This clocks the DAC (external) and sends that clock back to the CDP (which is really the way it should be done). But you are still better off with a one box player and sticking to I2S internally, if you can.

 

[Crowbar]

Quote:

Originally Posted by regal /img/forum/go_quote.gif that no one else is building.

This is ridiculous. DIY is not about kits since in those most of the work is already done for you--just a bit of soldering required. How many people build something has nothing to do with DIY. I put together an X-ray machine in the basement, and that's as much DIY as a Cmoy, despite very few people having done it.

Quote:

it never worked out

It does work, he's simply not using it. I suggest you email him to confirm that it worked.

Quote:

ultimate in jitter reduction, surpassing any clock upgrade.

Not really. The buffer is a much better idea. The problem with clock injection is that you're only removing jitter from a jittery clock on the transport side, but not the jitter due to the interface--the S/PDIF interconnect. Toslink especially is very bad, since the transmitter and receivers are horrible in terms of jitter. The coaxial is better, but there are still problems. RCA jacks are not 75 ohm to match the characteristic impedance of the cable, and thus you always get some reflections at the connectors, unless you replace them with BCN. Beyond that, it's not often that the terminations at the coax are exactly 75 ohms, with the same result. The receiver and transmitter ICs also have an effect on the jitter.

The buffer removes all dependence on input jitter (as long as the jitter is not so enormous that you have actual data loss). Someone from the diyaudio forums built a version which works with standard S/PDIF and doesn't need any modifications on the transport: http://vincent.brient.free.fr/dac_eng.htm

He posted more information about the operation on the forum there:
Quote:

Originally Posted by vincent_brient The systeme is totally synchronous with the DAc oscillator. It samples the incoming CS8416 I2S signal, select 1 data corresponding to a CS8416 SCK edge, stores it in the SRAM and the the data is output according the DAC SCK. After a few hours the 0.2s FIFO can get full or empty but it never happens because the FIFO is reinitialised whenever the data is a long silence (track change ou disc change). Read and Write access to the SRAM are quick so I wrote the VHDL so that it never happens at the same time. There is a period of time reserved for reading and one for writting.

I'm working on a different version of such a system that completely electrically decouples the jittery input from the data fed to the DAC, such that the well known jitter coupling through power supply and other circuits cannot occur. However, I'm not relying on S/PDIF, so a modification is needed for the transport. S/PDIF overall is a very crappy standard. Hawksford's AES journal paper from way back in the 90s trashes it very nicely: http://www.scalatech.co.uk/papers/aes93.pdf (section 3 is most relevant).

 

[colonelkernel8]

Kill me now? I think once again we have strayed off topic. Waaay off topic.

 

[Crowbar]

It's not off-topic, when you consider that the whole point of upgrading the clock is to get lower jitter. So I'd say that a more general discussion about dealing with jitter is warranted.