Quote:
Originally Posted by tosehee /img/forum/go_quote.gif
Dan.
Did you or someone say that most modern DACs are already equipped with some sort of reclocking chip which cleans the jitter? If this is true, then most if not all of new SPDIF converters are just plain marketing, or is it?
I am curious because I do not want the placebo affecting my buying decision.
As also, thanks for your thoughtful response and insight.
With kind regards
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I did not say that. But virtually all DA's have some jitter cleaning circuitry. At the minimum one has some circuit called a PLL (phase lock loop) which cleans up much of the higher frequency jitter content. There are other schemes as well, some are very sophisticated.
And jitter is not only about the timing errors in the signal arriving on some cable into the DA. Much of the jitter issue has to do with timing errors due to power supply, component and circuit noise, electromagnetic pick up, poor layout... All that is INSIDE the DA, and that is where most of the issues are.
I am not saying that one should ignore jitter on the data arriving to the DA on a cable, but that is often a very secondary issue.
DA jitter matters at ONE LOCATION - where the digital signal is altered to analog. If you have 10 nano second of jitter, arriving on a cable from and interface, but the jitter energy is at say ABOVE 5KHz, that signal may go through a PLL circuit before it gets to the DA (where it matters). The PLL may clean the jitter it up by say 40dB (that is very realistic) and if so, the jitter is attenuated from 10nsec to 100psec. (40dB is 100 time attenuation). So one guy is measuring 10nsec, the other guy does not hear the impact, because the DA circuit "fixed the problem". it Is that surprising?
It is no wonder that while one is measuring over 10nsec, another is not hearing it. If that jitter energy were at say 100 or 500Hz, the PLL would be of little help. It may not reject low frequencies at all. One needs to know more detail then just one number. A 20nsec jitter at 10KHz may be less of a problem then a 1nsec jitter at 500Hz. One needs to have much more detail then some "simplified overall number".
On top of what I said above, there are all sorts of jitter types, and some are very offensive, others are less offensive. A totally random jitter that is equally spread accross the frequency range tend to do least harm, probably just increase the noise floor by some amount. Jitter that is originated by the data (digital content) itself may have it's own character (change in timbre - coloration). Jitter that has a distinct frequency (such as line frequency, or some other coherent source) tends to make "tones at frequencies not related to the music" and that does not sound good...
It is important to know WHERE the jitter needs to be low, and that depends on SPECIFIC designs. A DA has more then one clock, often 3 clocks, and one has to know where jitter matters, and where it does not.
Looking at data transfer jitter, on the outside of the DA chassis, even at the end of a cable leading to a DA, is not a bad practice. Looking at the voltage, power, noise and so on is also good. But jitter on the outside can be 100 times higher then the jitter that matters, at the critical location inside the DA.
This is a rather complex subject. There is substitute for much learning and years of hands on in a well equipped lab, and I can not "clear the fog" in a few posts. But it is not surprising to me to see so many conflicting opinions.
Regards
Dan Lavry
Lavry Engineering