Die shrinks of what proportion? Is this a swag (based on what?) or just pure speculation? I ask because I've read that smaller transistors use less power, but I don't know enough about it to know why or how to estimate the power savings.... Just trying to learn something new. The only reason I made my previous comment is because I've sat through enough vendor product roadmap meetings to have the generic plot of cost/performance burned into the back of my eyelids.
There is the claim on the Artix-7 product intro webpage that 28nm process gives up to 50% power savings over 45nm process. https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html