[r_d]

I've been playing around with the idea of building an S/PDIF DAC for the past few weeks, and I think I've got a start. I'm sort of new to the whole DIY audio thing, so I'm sure my current design is full of problems. It uses a DIR9001 for the S/PDIF codec and a PCM1792 to do digital/analog conversion.

Schematic:


Incomplete board (I'll probably make significant changes):


If I build this, I might just jumper the BUF364Ts to save a little money. If they're necessary, I can always add them later. I may also substitute the OPA2132 op-amps for OPA2227s or omit the DC servo.

I've got two main issues.
The first is that I've never made/bought a PCB before. Everything I've done so far has been on perf board or point-to-point. I don't really like the idea of working with strong acids or waiting months to get a board that might have some flaw in it that I overlooked.
Additionally, I don't have a good +/- 12/15V power supply. Yet.

Perhaps this is too ambitious for a beginner, but I've never learned anything by doing things the easy way.

 

[cobaltmute]

Just a few random thoughts:

I'm guessing you are comfortable with software control of the DAC. Otherwise the PCM1798/1974 would be easier as they are hardware control.

With the current output of the PCM1792/94/98, you can goto a simpler I/V stage and still get good results. Just check out the ezDAC schematics for ideas. IIRC, the ezDAC layout came from an application note somewhere (don't remember the link). I use this for my DAC and quite like the sound.

You seem to be missing all the decoupling caps on your power pins on the DAC.

 

[r_d]

Quote:

Originally Posted by cobaltmute /img/forum/go_quote.gif I'm guessing you are comfortable with software control of the DAC. Otherwise the PCM1798/1974 would be easier as they are hardware control.

Digital control is probably easier for me because that's where I've got the most experience.

Quote:

Originally Posted by cobaltmute /img/forum/go_quote.gif With the current output of the PCM1792/94/98, you can goto a simpler I/V stage and still get good results. Just check out the ezDAC schematics for ideas. IIRC, the ezDAC layout came from an application note somewhere (don't remember the link). I use this for my DAC and quite like the sound.

I was originally going to combine the I/V and differential stages, but the datasheet suggested this configuration. Do you know if there was a reason for that?

Quote:

Originally Posted by cobaltmute /img/forum/go_quote.gif You seem to be missing all the decoupling caps on your power pins on the DAC.

Fixed:


There's still a few pins on the DIR9001 that I'm unsure how to connect.

 

[cobaltmute]

One of the goals of the design in the datasheet is the get the S/N numbers that are presented. I haven't the PCM1792 one, but it outright states that on the PCM1794. Not the necessarily the mostmusical output stage, just the best S/N one. I've never implemented the datasheet stage, so I'll make not comments about how it sounds.

As for the pins on the DIR9001, page 25 of the datasheet shows you what caps you need on power pins.

 

[persivore]

As already suggested, you need to add in decoupling capacitors around the DIR9001 and microcontroller, as well as on the analogue supplies used for the I/V converters and output stages.

You need to put in the PLL low pass filter capacitors/resistors around the FILT pin on the DIR9001. The recommended values are in the DIR9001 datasheet.

I would suggest using a local, low jitter clock source for the master clock, rather than the recovered S/PDIF clock.

If you're running long I2S lines, I would also suggest putting damping resistors on the I2S lines to help damp ringing.

If you like digital control, maybe look at the SRC4392, so that you can use the full 192KHz supported by the DAC and make use of the ASRC too.

 

[r_d]

Alright, so I've decoupled most of the power supply pins, removed the buffers and DC servos, added the SRC4193 asynchronous sample rate converter (digital control, like the SRC4392, but it's ssop28 and $6 cheaper), added a proper clock source, and a bunch of other stuff.

I took another look at the I/V stage. The inverting input of the op-amps are virtual grounds with effectively no resistance. Most other means of converting current to voltage would cause there to be some positive/negative electric potential at the differential current outputs. I don't know if this would adversely affect the signal, so I'm going to leave it as is.

As for the damping resistors, are there any guidelines for predicting where they would be necessary? It seems like it would be a lot of trouble if I tried to put them on every digital I/O line.

This is the new schematic:


And the new board:


Any other changes I should make?

 

[00940]

Interesting design. A few things:

- If you're comfortable soldering the ssop28, why don't you use smd opamps too ? It would save some space.
- You are using a same 3.3V for all the logic. I highly suggest you to add ferrite beads at all the supply pins of the digital ICs (before the decoupling caps), in order to avoid interactions in between the chips through the supply.
- What's the point of a "split groundplane" if you pass lines under the dividing cut ?

 

[DaKi][er]

Traces shouldn't cross split groundplane boundaries, that is the worst thing you can do to a layout. And once you've designed around the split and got your traces right, remove it as it is better not to have one in there (the datasheets lied)

Don't use the auto-router, it stinks

I thought ASRC's work best when you have a output frequency very different to the input, not a simple integer multiple, something to do with how the maths works, so while it may be good for 44.1, all the other sampling frequencies won't be as good when using the 24.576 clock as it is a simple multiple

Keep practising on your layout techniques, the layout is part of the circuit and can make or break a design. Here's a pcm1792 board layout I did not long ago if you want some guidance - 1, 2, 3.

 

[r_d]

As suggested, I've:
1. Added ferrites
2. Unsplit the ground plane
3. Tried wiring the board manually

This is the result:
Schematic
Board

Quote:

Originally Posted by 00940 /img/forum/go_quote.gif - If you're comfortable soldering the ssop28, why don't you use smd opamps too ? It would save some space.

I can solder surface-mount if I have to, but I'm not totally comfortable with it.

Quote:

Originally Posted by DaKi][er /img/forum/go_quote.gif I thought ASRC's work best when you have a output frequency very different to the input, not a simple integer multiple, something to do with how the maths works, so while it may be good for 44.1, all the other sampling frequencies won't be as good when using the 24.576 clock as it is a simple multiple

The datasheet says "The reference clock may operate at 128fS, 256fS, or 512fS, where fS are the input or output sampling frequency."
So I guess it's not totally asynchronous.

Quote:

Originally Posted by DaKi][er /img/forum/go_quote.gif Keep practising on your layout techniques, the layout is part of the circuit and can make or break a design. Here's a pcm1792 board layout I did not long ago if you want some guidance - 1, 2, 3.

Thanks for the examples.
My attempts aren't much better than the autorouter. I guess I've still got a lot to learn.

 

[cobaltmute]

Quote:

Originally Posted by r_d /img/forum/go_quote.gif The datasheet says "The reference clock may operate at 128fS, 256fS, or 512fS, where fS are the input or output sampling frequency." So I guess it's not totally asynchronous.

For example, if you choose for output fs=50khz then your ref clock could be 25.6Mhz (512fs)

The ref clock is either your input or ouput clock from the SRC (as chosen by you) You can then choose your desired fs and mulitplier (assuming that it works within the bounds of your DAC chip)

 

[r_d]

Quote:

Originally Posted by cobaltmute /img/forum/go_quote.gif For example, if you choose for output fs=50khz then your ref clock could be 25.6Mhz (512fs) The ref clock is either your input or ouput clock from the SRC (as chosen by you) You can then choose your desired fs and mulitplier (assuming that it works within the bounds of your DAC chip)

Right, I was just pointing out that the clock rate can't be a a non-multiple of the I/O frequencies as DaKi][er had suggested. At least not with this particular IC.

Edit:
Also, my computer's awful integrated audio has a coaxial S/PDIF output. Should I try to stick a coax input on this circuit, or should I just make/buy a coax->toslink converter? Would the added isolation provide any real benefit?

 

[DaKi][er]

Quote:

Originally Posted by r_d /img/forum/go_quote.gif Right, I was just pointing out that the clock rate can't be a a non-multiple of the I/O frequencies as DaKi][er had suggested. At least not with this particular IC.

The ASRC resamples the audio from one sample rate to another, the 'Asynchronous' part of the name says that the input and output frequencies don't have to be in sync. What I was saying is that you don't want your input and output frequencies to be the same. They actually wont be the same as you'll have one at 44.1001khz and the other at 44.0999khz for example and with these slight differences in the ratio, the ASRC's maths won't do the best job

I'm no expert on ASRC's but I knew I read it somewhere - PSW Recording Forums: Bruno Putzeys => The pros and cons of SRC for jitter reduction.

 

[r_d]

Oh, I misunderstood.
This is about aliasing, then?

 

[cobaltmute]

You may find some comments here:
DIYHiFi.org • View topic - ASRC+DAC questions

Depending upon your source data, using SRC is for getting the DAC into its "sweet spot" for good sound. Some claim that SRC does jitter reduction and some also claim that he math units in the SRC's are just OK for doing the math required and the process can be done better in other chips.

 

[r_d]

If upsampling causes these weird artifacts, is it even worth it at all?