BJH1
New Head-Fier
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- Jan 23, 2013
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EDIT: STUPID QUESTION ALERT! DON'T BOTHER READING UNLESS YOU WANT TO WASTE YOUR TIME.
...but do take the time to check out Warren's interesting article.
Good evening all,
I have read with interest Warren Young's article called "Working With Cranky Op-Amps". You can find it here. Having read the article I have just one question, and it's with regard to the highlighted part of the following quote:
The highlighted statement refers to the circuit shown here. Sorry about all the page links by the way; I did try to attach pre-prepared explanatory images into this post but when I try that I just get a server complaint - I think it might be because I'm a new user. So external links is the only way I can reference Warren's material.
MY QUESTION:
My question is, can someone explain to me how the D.C. resistance at the inverting input becomes R3 & R4 in parallel? I've had a little think about it and the only way I can imagine that being the case is if the op-amp output end of R4 was tied to ground (which would be stupid, obviously). Otherwise I can't understand how the inverting input resistance becomes the parallel combination of R3 and R4.
To my mind, the resistance at the inverting input is 1K in parallel with (10K + output load). The load isn't shown, but if it's a set of headphones (<32R?) then we can just forget the load and call it 10K in parallel with 1K which is indeed the 909R stated in the article.
...I think I've just answered my own question! Doh!
Thanks all,
Brian.
...but do take the time to check out Warren's interesting article.
Good evening all,
I have read with interest Warren Young's article called "Working With Cranky Op-Amps". You can find it here. Having read the article I have just one question, and it's with regard to the highlighted part of the following quote:
Now take a look at page 3 of the National Semiconductor LM617x datasheet. There you will find a spec for “input bias current,” which is this base current. For the LM617x, this can be as high as4 µA. That's a pretty tiny current, but consider what happens when you force this current across the relatively high resistor values at a CMoy amp's inputs. Ohm's Law tells us that if R2 is 100 kΩ, forcing 4 µA across it will develop a voltage of 0.4 V. Hmm! Now we're talking about something significant. Okay, what happens at the other input? From the DC perspective, the resistance at a CMoy amp's inverting input is R3 and R4 in parallel. Using the default values of 1 kΩ and 10 kΩ, the parallel resistance is 909 Ω. If you force 4 µA across that, you get only 2.7 mV. The offset at the noninverting input is so much higher than at the inverting input that it's close enough to the truth to say that there's 0.4 V of DC offset at the CMoy amp's input with this configuration. When you multiply that by the amp's gain, which is 11 in this instance, you get 4.4 V at the op-amp's output. This much DC offset will kill headphones very quickly.
The highlighted statement refers to the circuit shown here. Sorry about all the page links by the way; I did try to attach pre-prepared explanatory images into this post but when I try that I just get a server complaint - I think it might be because I'm a new user. So external links is the only way I can reference Warren's material.
MY QUESTION:
My question is, can someone explain to me how the D.C. resistance at the inverting input becomes R3 & R4 in parallel? I've had a little think about it and the only way I can imagine that being the case is if the op-amp output end of R4 was tied to ground (which would be stupid, obviously). Otherwise I can't understand how the inverting input resistance becomes the parallel combination of R3 and R4.
To my mind, the resistance at the inverting input is 1K in parallel with (10K + output load). The load isn't shown, but if it's a set of headphones (<32R?) then we can just forget the load and call it 10K in parallel with 1K which is indeed the 909R stated in the article.
...I think I've just answered my own question! Doh!
Thanks all,
Brian.