Hi,
I believe he is referring to "Process Corners" in developing transistors.
I think I can explain this in layman terms, given my recent experience as a frustrated grad student in electrical engineering (vlsi circuits no less).
When you design an opamp, they have to be "fab'ed" at a clean room like MOSIS in Marina Del Rey, CA. The CMOS (twin-tub, p, n) fabrication process involves the laying down of layers of metal or "substrate" to create a particular circuit design. Pits in the substrate are formed via etching via chemical washes. The end result is a tiny chip with all the proper transistors and switches. Care must be taken not to create parasitic current-drawing npn or pnp junctions in the substrate where they were not intended to be.
Now, there's another process called "doping". Doping in simple terms is where you infuse the substrate with a particular ion that is either an electron donor or electron acceptor. The doping process affects the performance in a transistor. There are two types of CMOS transistors, NMOS and PMOS. NMOS pass logic "0" well and PMOS pass logic "1" well. The switching speed is heavily dependant on the doping process.
Often times, you'll see what are called "Process Corners" marked with the letters SS, FF, FS, TT. "TT" means that both NMOS and PMOS are "typical" in their switching speed, i.e. compromises were made so that the switching speed of both transistor types were equal. FS means that the PMOS switches Fast but the NMOS is slow.
In general, if you optimize the process so that the NPN (nmos) transistors switch very quickly and are high performance, you will sacrifice the performance of the PNP transistors, and vice versa.
High gain negative feedback op amps often have harmonic distortion. The measure of this is the IIP2/3 TIM figures. I believe IIP3 is intermodulation for small signal AC and TIM is large signal . . . not sure.
Slew Rate is a figure that is calculated by finding the speed at which the voltage changes per second during a logic transition from 0 to 1 (10% to 90% of swing).
Anyway, hope that clears things up
Disclaimer: I've never built an amp for audio applications in my life. My experience is solely in the field of VLSI design, RF Circuits, and oddly enough chemistry. . .
Thanks,
thatopampguy.
Quote:
Originally Posted by kevin gilmore
All monolithic opamps made by any manufacturer are subject to a few
design rules that must be adhered to. One is that you really can't
have the best pnp and npn transistors on the same substrate at the
same time. If you optimize for the best npn possible which is usually
the case (vertical npn's) then the pnp's end up being lateral. As the
pnp is already slower to begin with due to minority carrier travel time
the chances of perfectly matched pnp and npn transistors is very
difficult to obtain. Usually a pnp is tied to a npn transistor making
a composite pnp which still is not as good as the corresponging npn.
In addition the significant amount of open loop gain may be good for
some applications, but is 40 to 50 db more than necessary for a good
headphone amplifier whose gain is usually less than 10db. The additional
gain increases TIM and other slew rate induced distortions.
For audio use a well designed discrete amplifier will beat any opamp
based unit.
My opinion of course.
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