[Samgotit]

Quote:

Originally Posted by Garbz Personally i prefer a good non-reclocked circuit that does everything to minimise existing line jitter, then have asynch reclocking making a crap design crap in a different way .

Garbz,
Do you have any example schematics of what you describe above.

 

[ble0t]

Quote:

Originally Posted by Xakepa I got the differecne, interesting thread, thank you guys. The only thing that puzzles me is why Monica-2 and DAC-AH choose CS8412/14 instead of true ASRC...is it much harder to implement? Thanks.

The CS8212 and CS8414 are not ASRC chips...they are receiver chips designed specifically to receive and decode SPDIF signals. I just thought I would clarify that...

 

[Garbz]

Using the CS8412/8416 style of receivers, Jocko Homo posted this lovely circuit http://www.diyhifi.org/forums/viewtopic.php?p=5707#5707.

When building my DAC I tried a few things. Firstly just the RCA into the receiver (horrible), I also tried a few other things including ASRC while I was waiting for input transformers.

In the end I decided to scrap that, build a good powersupply for the PLL in the receiver chip, and build that input circuit by Jocko. Combined with BNC connectors it gave me by far the best sound.

Early prototype:
http://www.garbz.com/P2050026.jpg