fran
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- May 3, 2006
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from the DDDac website:
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What do you experts think? Is this all mumbo jumbo? The DDDac itself does have a good rep so it mustn't be complete BS...
Fran
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built for my self a version with 60 DAC chips in total (so 5 modules). This results in an stochastic improvement of 2,8 bits resolution. I believe it won't make much sense to go beyond this, as the amount of chips (AND Power consumption !!!) would grow ridiculously..... |
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f you run (ANY !!) process many times, after each other or in parallel does not matter, the uncertainty or errors in the output of the process will improve with the function of SQRT(n) where "n" stands for the number of events. This trick can be used for example to get very precise resistors or capacitors by paralleling them. Thanks to the current source output we can easily do the same for the TDA1543....... |
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Is there an optimum? I am sure there is, but I was not so crazy to try all possible variations of "n".... I tried in a prototype 3 DAC's in parallel and this was a major improvement. The low level detail, known from high bit systems was really improved. Listening to the 8 DAC version, it comes very close to SACD.... not bad I think (again an understatement... So how many is realistic? well for each doubling of improvement, which equals 1 bit extra of linearity we need to multiply "n" with 4 !! so with 8 I get one and a half bit extra, which actually is already very good. If I want now 4 bits better performance I need to put 4x4x4x4=256 DAC's in parallel. This will consume 12A supply current and dissipates 100Watt. Feel free to do so, but it seems a bit unpractical to me, not even mentioned the circuitry needed to drive the 256 TTL inputs !!! Why did I mention 4 bits? Well, according to the datasheet, the 1543 is aprox 12-13 bits effective. A PCM63 by the way is also not much better then approximately 15 bits effectively. All the rest is marketing So the choice for 8 is purely based on a combination of maximizing "n" and keeping things within reason technically......... There is also an additional EXTRA bonus by doing this: by paralleling the DAC's we have to decrease the R(I/V) resistor as the current increases. So the Output Impedance is also reduced by "n". This helps a great deal driving the interlink to the pre amplifier of directly to the end stages if you do so... |
What do you experts think? Is this all mumbo jumbo? The DDDac itself does have a good rep so it mustn't be complete BS...
Fran