[guzzler]

I was wondering if anyone could just check this little circuit. It's for a clay pigeon layout to provide some more options to the standard "on report" targets. So, schematic segment and then what I think should happen:

1) 5V to "INPUT" allows Q1 to conduct, and the R1-C1 to start charging (this will be controlled by a 555 to allow the full sequence to elapse) R1 is variable to allow a change of delay for the second target

2) when the voltage across C1 reaches the trigger voltage for the "A" inverter, the output from "A" goes low (which triggers the next 555, again not shown; the 555 triggers on the negative slope of a pulse for those interested)

3) this means that the base of Q2 is now below the emitter of Q2, and so Q2 conducts, resetting the RC network

4) the "B" inverter is there to ensure a ground route for the the C1 capacitor which is being shorted to ground

If anyone can pick a hole in this, I'd be grateful. I don't have time to build/test it until Christmas time

 

[tangent]

Without knowing what the INPUT and 555 inputs are doing, it seems to me that the initial state of this thing is to have Q1 conducting regardless of the state of INPUT. R1 holds inverter A's input high, so its output goes low, which forces inverter B's input high, which makes Q1 conduct. Not true?

It would be helpful to have the timing diagram for the 555 input. The output impedance for both inputs could play into it, too; can you provide those?

 

[guzzler]

Sorry, the 555 connection is to the trigger of a 555 set up in monostable mode output for 1s to make sure the trap goes through its full firing cycle.

You have found a problem with the input, I completely forgot to consider that Q1 would act as an open circuit initially so the input at "A" would be high, and then the charging cycle would begin immediately. It's not going to charge at all I think. Ignoring the INPUT completely, initially output "A" is low, so "B" is high and Q1 conducts. At this point, input "A" is 0V so Q2 conducts, and so C1 can not charge at all and the input to "A" is held at 0V

Anyways, thanks for the input; I've come up with a new version. I won't bore anyone with the schematic, unless asked. The flow of it is (for anyone interested):

1) 3 switches (trap A, trap B, pair) are connected to 3 inverters, so initially the output from all three is high.

2) Trap A and Trap B buttons feed separate 555s that are configured as monostable timers with 1s duration to turn on the relays which fire the traps

3) Pair button is connected directly to the Trap A 555, and a second 555 with variable monostable duration. The output from this one drives the Trap B 555 giving the delay option (output going low triggers the next 555)