Use separate decoupling caps. If you combine them, they would need to be twice as large, and would also tend to cause cross-coupling between the buffers' signals. Combining them would also make it difficult to achieve a good-enough layout, for minimal inductance (and impedance in general) as seen by the power pins.
The decoupling caps are like a small point-of-load power supply. They are there to supply demands for fast-changing transient currents. Their layout is very important, since too much inductance will make the transient response less accurate, and will also restrict the ability of the feedback loop to remove higher-frequency harmonics.
It is best to use more, but smaller, decoupling caps, in parallel, and place them all as close as possible to the power pins, with short-as-possible connections to both the power pin and (usually) the device's load's ground.
How have you calculated the capacitance values needed for decoupling?
You will also want a physically-small bypass cap for each power pin, which should be connected extremely close to the chip's power pin. Its purpose is to short-circuit high frequencies to ground, to defeat the hidden high-frequency positive feedback loop that exists in most transistor amplifier cicuits, through the power rail. Otherwise the circuit could oscillate or ring at high frequencies.
