Quote:
Originally Posted by mrdon
The first thing is to find out how much voltage is passing through that part of the output stage. After that, we all can determine what opamps will work. You will need a Multimeter or Voltmeter to do this and also a schematic of the OP176GP to determine what V- and V+ rails are.
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Don't know if that helps but I found datasheet:
"Datasheet text preview:
a
FEATURES Low Noise: 6 nV/Hz High Slew Rate: 25 V/µs Wide Bandwidth: 10 MHz Low Supply Current: 2.5 mA Low Offset Voltage: 1 mV Unity Gain Stable SO-8 Package APPLICATIONS Line Driver Active Filters Fast Amplifiers Integrators GENERAL DESCRIPTION
Bipolar/JFET, Audio Operational Amplifier OP176*
PIN CONNECTIONS 8-Lead Narrow-Body SO (S Suffix)
NULL 1 *IN 2 +IN 3 V* 4 8 NC
8-Lead Epoxy DIP (P Suffix)
NULL 1 *IN 2 +IN 3 V* 4 OP-482
OP176
8 7
NC V+
OP176
7 V+ 6 OUT 5 NULL
6 OUT 5 NULL
200 µV. This allows the OP176 to be used in many dc coupled or summing applications without the need for special selections or the added noise of additional offset adjustment circuitry. The output is capable of driving 600 loads to 10 V rms while maintaining low distortion. THD + Noise at 3 V rms is a low 0.0006%. The OP176 is specified over the extended industrial (*40°C to +85°C) temperature range. OP176s are available in both plastic DIP and SO-8 packages. SO-8 packages are available in 2500 piece reels. Many audio amplifiers are not offered in SO-8 surface mount packages for a variety of reasons, however, the OP176 was designed so that it would offer full performance in surface mount packaging.
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The OP176 is a low noise, high output drive op amp that features the Butler Amplifier front-end. This new front-end design combines both bipolar and JFET transistors to attain amplifiers with the accuracy and low noise performance of bipolar transistors, and the speed and sound quality of JFETs. Total Harmonic Distortion plus Noise equals previous audio amplifiers, but at much lower supply currents. Improved dc performance is also provided with bias and offset currents greatly reduced over purely bipolar designs. Input offset voltage is guaranteed at 1 mV and is typically less than
*Protected by U.S. Patent No. 5101126.
RB4 RB5 RB2 QB4 CB1 QB3 J1 2 JB1 QB2 Q3 RB1 R3 R1L QB1 Z1 CC1 R1A R1P2 1 R1S R1P1 R2P1 QB8 R2S 5 R2P2 R2L QB9 Q7 Q5 Q4 QS3 CF Q6 Q8 Q1 Z2 J2 Q2 3 Q9 CCB CC2 RB3 QB5 QB6 QB7 RB7 RB6
R4 Q10 QS1 RS1 R5 6 RS2 QS2 Q11
R2A 4
Simplified Schematic
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
OP176*SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V = ±15.0 V, T = +25°C unless otherwise noted)
S A
Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Large Signal Voltage Gain
Symbol VO S VOS IB IO S VC M CMRR A VO VO S / T
Conditions
Min
Typ
Max 1 1.25 350 400 ± 50 ± 100 +10.5
Units mV mV nA nA nA nA V dB V/mV V/mV V/mV µV/°C
*40°C TA +85°C VCM = 0 V VCM = 0 V, *40°C TA +85°C VCM = 0 V VCM = 0 V, *40°C TA +85°C VCM = ± 10.5 V, *40°C TA +85°C RL = 2 k RL = 2 k, *40°C TA +85°C RL = 600 *10.5 80 250 175 106
Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage Swing Output Short Circuit Current POWER SUPPLY Power Supply Rejection Ratio Supply Current Supply Current Supply Voltage Range DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product AUDIO PERFORMANCE THD + Noise Voltage Noise Density Current Noise Density
Specifications subject to change without notice.
200 5
VO I SC PSRR I SY I SY VS SR GBP
RL = 2 k, *40°C TA +85°C RL = 600 , VS = ± 18 V
*13.5 *14.8 ± 25 86 80
± 50 108
+13.5 +14.8
V V mA dB dB
VS = ± 4.5 V to ± 18 V *40°C TA +85°C VS = ± 4.5 V to ± 18 V, VO = 0 V, RL = , *40°C TA +85°C VS = ± 22 V, VO = 0 V, RL = , *40°C TA +85°C
2.5 ± 4.5 15 25 10 2.75 ± 22
mA mA V V/µs MHz
RL = 2 k
en in
VIN = 3 V rms, RL = 2 k, f = 1 kHz f = 1 kHz f = 1 kHz
0.001 6 0.5
% n V / H z pA/Hz
*2*
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OP176 WAFER TEST LIMITS (@ V = ±15.0 V, T = +25°C unless otherwise noted)
S A
Parameter Offset Voltage Input Bias Current Input Offset Current Input Voltage Range1 Common-Mode Rejection Power Supply Rejection Ratio Large Signal Voltage Gain Output Voltage Range Supply Current
Symbol VOS IB IO S VCM CMRR PSRR AVO VO I SY
Conditions VCM = 0 V VCM = 0 V V CM = ± 1 0 . 5 V V = ± 4.5 V to ± 18 V RL = 2 k RL = 2 k VS = ± 18.0 V, RL = 600 VS = ± 22.0 V, VO = 0 V, RL = VS = ± 4.5 V to ± 18 V, VO = 0 V, RL =
Limit 1 350 ± 50 ± 10.5 80 86 250 13.5 14.8 2.75 2.5
Units mV max nA max nA max V min dB min dB min V/mV min V min V min mA max mA max
NOTES Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. 1 Guaranteed by CMR test.
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V Input Voltage2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . ± 7.5 V Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite Storage Temperature Range P, S Package . . . . . . . . . . . . . . . . . . . . . . . . *65°C to +150°C Operating Temperature Range OP176G . . . . . . . . . . . . . . . . . . . . . . . . . . . . *40°C to +85°C Junction Temperature Range P, S Package . . . . . . . . . . . . . . . . . . . . . . . . *65°C to +150°C Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C Package Type 8-Pin Plastic DIP (P) 8-Pin SOIC (S) JA
3
ABSOLUTE MAXIMUM RATINGS 1
DICE CHARACTERISTICS
NULL
V+
OUT
V* NULL *IN +IN
JC 43 43
Units °C / W °C / W
103 158
NOTES 1 Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2 For input voltages greater than ± 7.5 V limit input current to less than 5 mA. 3 JA is specified for the worst case conditions, i.e., JA is specified for device in socket for P-DIP packages; JA is specified for device soldered in circuit board for SOIC package.
OP176 Die Size 0.069 × 0.067 Inch, 4,623 Sq. Mils. Substrate (Die Backside) Is Connected to V*. Transistor Count, 26.
ORDERING GUIDE
Model OP176GP OP176GS OP176GSR OP176GBC
Temperature Range *40°C to +85°C *40°C to +85°C *40°C to +85°C + 2 5° C
Package Description 8-Pin Plastic DIP 8-Pin SOIC SO-8 Reel, 2500 Pieces DICE
Package Option N-8 SO-8
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP176 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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I understand here almost nothing
