[Porksoda]

I have never understood the need for ornate discrete component output stages. As far as I know, these are the qualifications for an active I/V stage:

1. Take a current input and convert it to an AC coupled voltage output (assuming we are not talking balanced) with as little distortion as possible
2. Have as close to zero input impedence as possible
3. Maintain a constant input voltage

Here is my circuit. Disregard the labeling, as the SMASH command doesn't seem to like me. The marked supply voltages are not what I would actually use.

A quick hand calculation suggests an input impedence on the order of 20 ohms for typical values (positive supply being ~8V, and negative being ~-4, LED current around 10 mA)

Among the relatively few designs I have been able to find, I notice a lot of people simply use another transistor to hold the current input at ground. I've heard in a few places that some DACs actually work best at certain non-zero voltages, (I seem to recall reading this in one of the DDDAC guides) so I decided adjustable input biasing would be desireable, though it ends up dramatically increasing the input impedence.

The main reason I post this is to cultivate some discussion on the subject and hopefully arrive at something better than what I have originally proposed. So, what are people's thoughts on my stage, and I/V stages in general?

 

[Fresno Bob]

Porksoda it seems simple compaired to some stages i have seen. the only true way to find out if you like it our not is to build it.

 

[Glassman]

point two and three are actualy the same thing and yes, you understand the needs perfectly.. this would work, how good, that's another story

check out the internal connection of AD844 and OPA660, those are current feedback amps.. basicaly two diamond buffers coupled together, the input current goes to the 'output' of the first buffer, hereby called inverting input and the noninverting one serves as a voltage reference.. the current is then mirrored and bought together with a resistor connected to ground, which balances the current and acts as the actual I/V converter, this high impedance node is then input to the second buffer.. you can run this either open loop (with lower value I/V resistor) or closed loop..

this is the best I/V design I've seen so far.. by the mighty Malcolm..

 

[Porksoda]

That was an interesting read! I'm still not sure of some of the details of the circuit designs in that paper, but I think I get most of it.

More circuit designs to come...

EDIT: Also perhaps I should have been more clear in my original qualifications for my I/V circuit. Number 3 was meant to suggest a consistent user selectable input voltage.

 

[Porksoda]

Okay new design based on the one from that paper Glassman posted. It's design is similar but it includes differential input, so it could be used in a non-inverting configuration, unlike the one in the paper which is inverting only. I've got to get back to work right now, so I will post a better description of what it is doing later tonight. See that paper for a reference.

Constructive criticism is of course welcome

Cheers

 

[Porksoda]

Okay updated circuit and an explanation:

Ok. First off, this is a fully differential transimpedence stage. T9 acts as a current sink, setting the bias current for the first half of the circuit. T7 controls a current mirror with T6 and T8. T5 (the one connected to ground) controls the emitter voltage of T3 and T12, the two input transistors. Because the current is mirrored across all 3 transistors, and their collectors are kept at the same potential (by T4, T11, and R10), their Vbe drops will vary identically with the input current, keeping both inputs at ground.

The result of this stage is that a bias current is set by T9, and any current injected at IMINUS results in a drop in the current across the mirror. On the right hand side of the mirror, IPLUS adds current to the stage. The result is that the current flowing into the third transistor from the left on the bottom (the one with its title jumbled) is the difference of the two input currents plus a bias current.

The two transistors at the bottom mirror the current up to a wilson current mirror (transistors 18 and 14). This stage then feeds into a current sink, which is matched to the original current sink that set the bias point of the circuit. The result is that any remaining current in this stage after the bias is removed is forced into the pi filter and output stage. The pi filter removes high frequency hash, and R15 sets the open loop gain for the amp. T16 and 17 set the current for the class A output stage.

To set the closed loop gain, one simply connects a resistor of the desired transimpedence between VOUT and IMINUS. This value must of course be less than the value of R15 for the feedback circuit to work properly.


NOTES: I found a couple errors in the circuit as I was writing this. First off the power rails are pretty much where you would guess, and would be +/-15V. Second, T7's base and emitter should be connected, creating the current mirror. Also, the current mirror at the bottom, the two transistors with their names jumbled, would NOT be a wilson current mirror as their picture suggests. This would pull the emitter of T5 below ground and probably fry it, so T23 can be omitted.


Okay so I have a question for the gurus out there. I used a wilson current mirror for the last stage because I anticipated the large voltage fluctuations where the current goes into the pi filter, and figured the wilson mirror is less sensitive to load variations. However, it occurs to me that it might also be less linear than a standard current mirror, or somehow less desireable, as I never see it used in audio.


Comments, criticisms?


EDIT: Yeah, a lot of the labels are kinda jumbled and not easy to interpret. I'll get around to SMASHing them and clean it up a bit later...

 

[Porksoda]

Beuller? Beuller?

 

[Glassman]

heh looks like I am obliged to post something

your circuit kinda misses the point which is aiming for zero input impedance, you would need to use separate transistor pairs for each input, each of the transistor in the pair with the same current going through.. the part in the middle is also kinda unnecessary, double mirroring without much reason.. you could have done the same circuit as in the Malcolm's paper and another one mirrored, that means switching NPN for PNP and vice versa.. that way you would get balanced inputs, unbalanced output.. maybe I'll try to sketch it sometimes later..

 

[Porksoda]

I think I know what you mean. I will draw it up myself.

The way the above design is worked, the middle leg of the first mirror is designed so its base (connected to the base of the other two transistors) is one Vbe drop above ground, keeping the emitter of both input transistors at exactly ground. It is the same as the second leg of the mirror in malcolm's design.

That having been said, I think the idea you are suggesting will probably work better, so I am going to try and re-work the design.

 

[Porksoda]

I tried making a complementary version like you described, but I can't find a way to make a non-inverting input except for how I did it in my last design. In the original design, when you add positive current at the input, the output of the last current mirror drops and the current source (connceted to the negative rail) pulls current out of the filter stage. In a complementary design, when you add current at the input, the output of the last current mirror (connected to the negative rail) increases and tries to pull current from the filter stage. Either way, the result is that positive current input results in negative current output from the first stage, resulting in negative voltage.

You could make a stage where the polarity of the transistors is the same, but the current source is on the positive rail and the current mirror is on the negative rail, but that is exactly what my second schematic is. I just combined the second leg of each input stage into one, since they are both carrying the same current in this configuration. In my configuration, the bias current for the second input is actually the output of the first stage. This means that any additional current from the second input is added to the output from the first input. The result, the difference of the two inputs plus the bias current, is then passed to the filter stage.

EDIT: Updated Schematic

 

[Porksoda]

Ah, I think I see a problem with my schematic! The IPLUS input will try to pull the current mirror after it up to ground and tons of current will get dumped into the output stage! I'll work on this...

 

[Glassman]

this is my take:

 

[Porksoda]

Here is the problem with that circuit, as I read it:

If you inject positive current at PAD1, the current through mirror T8/T9/T10 increases. This causes T10 to try and pull more current from R11, driving the output negative.

If you take the same situation, but this time inject positive current into PAD2, the current through mirror T4/T5/T6 will DECREASE, causing T10 to again try to pull more current from R11 to compensate.

Thus both inputs will be inverting.

Here is my next stab at it. It is similar to the one you just posted, but with 1 additional current mirror to cause one input to be non-inverting.

It seems to me, from working on this, that the two sides must be asymmetric by one current mirror in order for this type of device to work. The extra mirror causes one input to be non-inverting.

 

[Glassman]

Quote:

Originally Posted by Porksoda Here is the problem with that circuit, as I read it: If you inject positive current at PAD1, the current through mirror T8/T9/T10 increases. This causes T10 to try and pull more current from R11, driving the output negative. If you take the same situation, but this time inject positive current into PAD2, the current through mirror T4/T5/T6 will DECREASE, causing T10 to again try to pull more current from R11 to compensate. Thus both inputs will be inverting.

sinking some current into PAD1 has the same effect as sourcing it from PAD2, so clearly both inputs work against each other.. just imagine the other half of the circuit as just a constant current source/sink in both of the cases stated above..

more specifically, PAD2 is noninverting, while PAD1 is inverting input, check it out once again and observe to where is the current through R11 flowing from ground..

Quote:

Originally Posted by Porksoda If you take the same situation, but this time inject positive current into PAD2, the current through mirror T4/T5/T6 will DECREASE, causing T10 to again try to pull more current from R11 to compensate.

this is wrong, injecting more current into there will increase current through the mirror, not decrease it..

 

[Porksoda]

Current through T16 is constant, as it is a current mirror. Therefore, the current through T4 plus the current from PAD2 must be constant. So, if one increases, the other must decrease or the current through T16 would change.