Master Clock Talk
Oct 23, 2023 at 6:39 AM Post #2,866 of 3,362
If clocks are more accurate now than “back then”, why are you arguing they need to be bypassed in favour of an external clock, when an external clock was worse performance even than a “back then” (internal) clock!
Complement (-ed) is a better word. Knowing details of PLL technology you would understand. You don't, so look around the world. You will see, 10MHz external clocks are everywhere where there is a need for sharing data transfers between multiple users or improve token recognition: cellular communication towers (now mandatory in 5G), Ethernet cards for data centers (10Gbit and above) are synchronised with 10MHz external clock, much more. Why do they need external clocks? It doesn't make a sense according to your argumentations.

Even your primary troll partner praise a DAC which has a 10MHz clock synthesiser instead of two fixed frequency precise oscilators, which is more common. Go figure...
 
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Oct 23, 2023 at 7:33 AM Post #2,867 of 3,362
I know it is all confusing for someone whose IQ is below the room temperature.
It’s clear that you do indeed know, so why argue if you know your “IQ is below room temperature”?
Believe it or not, but in the meantime clock technology has evolved at a point where short time frame accuracy (jitter) is measured in pico seconds
Again, what “in the meantime”? Clock technology had evolved to a point where jitter was measured in pico seconds over 30 years ago, even in cheap consumer devices! And, that’s exactly the point, the threshold of human hearing (with music recordings) is in the range of hundreds of nano seconds. Although, this obvious, simple point is clearly beyond someone “whose IQ is below room temperature”!
Knowing details of PLL technology you would understand. You don't, so look around the world.
So you’re saying you don’t know the details of PLL technology and don’t understand. If you did, then why would you want to pass an external clock through one?

Also, why don’t YOU look around the world. What audio format around the world uses a 10mHz sampling freq and what is the clock input signal of DAC chips around the world?
Why do they need external clocks?
Clearly you don’t know why they need external clocks. Why don’t you find out BEFORE arguing? And while you’re at it, why don’t you find out when it’s therefore important in an audio system? It’s not hard, seeing I’ve already posted an article explaining it!
It doesn't make a sense according to your argumentations.
Of course it does, why on Earth have I owned so many external clocks for more than 25 years and still use one daily? If you’re going to argue, at least use an argument that makes a modicum of sense!

G
 
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Oct 23, 2023 at 8:09 AM Post #2,868 of 3,362
So you’re saying you don’t know the details of PLL technology and don’t understand. If you did, then why would you want to pass an external clock through one?

Also, why don’t YOU look around the world. What audio format around the world uses a 10mHz sampling freq and what is the clock input signal of DAC chips around the world?
The same answer from the other point of view. Cellular towers or 10-100Gbps Ethernet network cards don't use 10MHz sampling frequency for decoding. Right? Or wrong?
So why they use 10MHz reference clocks?

If you answer this question (you are trying to avoid), it will be easier understand why you need the same things for audio.
 
Oct 23, 2023 at 8:13 AM Post #2,869 of 3,362
Even your primary troll partner praise a DAC which has a 10MHz clock synthesiser instead of two fixed frequency precise oscilators, which is more common. Go figure...
it uses that clock synth right where it belongs. Inside the DAC!!

Believe it or not, but in the meantime clock technology has evolved at a point where short time frame accuracy (jitter) is measured in pico seconds
A 10Mhz clock cannot be cleanly divided by 44.1khz or 48khz, and it cannot and does not directly run the DAC.
Instead, the DAC uses a PLL system with the 10Mhz clock as the input reference, to output a 49.1520/45.1584Mhz (or whatever the required rate is) using its own clock internally.
It does not and was never intended to improve short term timing/jitter performance and will make it worse due to the challenges of fractional clock division.
 
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Oct 23, 2023 at 8:43 AM Post #2,870 of 3,362
A 10Mhz clock cannot be cleanly divided by 44.1khz or 48khz, and it cannot and does not directly run the DAC.
Instead, the DAC uses a PLL system with the 10Mhz clock as the input reference, to output a 49.1520/45.1584Mhz (or whatever the required rate is) using its own clock internally.
It does not and was never intended to improve short term timing/jitter performance and will make it worse due to the challenges of fractional clock division.
The fractional clock division is negligible since the master clock frequency of 10MHz is a multitude higher (227.27 times higher) then the sample frequency of 44.1KHz

You know that the R26 works with an internal 10Mhz clock? If you care about fractional clock division, then why on earth have you bought the R26 DAC?
 
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Oct 23, 2023 at 8:51 AM Post #2,871 of 3,362
The fractional clock division is negligible
Negligible? It’s the main reason all your external clocks add jitter and distortion.
It’s one of the main culprits that causes all these “benefits” you say external clocks provide! 😂
See you have no idea what you are talking about and have no idea what your external clock is doing.

The implementation on the R26 is keeping the clock right where it should be. Inside the DAC.
Marketing to sell you another box is why it has an external clock input.
 
Oct 23, 2023 at 9:18 AM Post #2,872 of 3,362
Negligible? It’s the main reason all your external clocks add jitter and distortion.
It’s one of the main culprits that causes all these “benefits” you say external clocks provide! 😂
See you have no idea what you are talking about and have no idea what your external clock is doing.

The implementation on the R26 is keeping the clock right where it should be. Inside the DAC.
Marketing to sell you another box is why it has an external clock input.
😂 man either you are stupid or you playing being stupid or you like trolling around.

I already explained to you few post ago what jitter means.

External clocks have lower phase noise and jitter performance then internal clocks unless we are talking MSB DACs, but then we are talking $20k and up.
Dont know what you want to prove?
 
Oct 23, 2023 at 9:27 AM Post #2,873 of 3,362
The implementation on the R26 is keeping the clock right where it should be. Inside the DAC.
Wrong. A place for a clock is where synchronous audio data stream is created. In terms of traditional audio interfaces like S/PDIF or I2S it is at the source, not DAC. For the asynchronous type of connection it is right. So, it is a half true.

However your partner claims that a pair of fixed frequency oscilators of a native audio sampling families is superior, so why Gustard use the 'inferior' solution? In fact the internal clock synthesiser in Gustard is not a prime quality.
 
Oct 23, 2023 at 10:14 AM Post #2,874 of 3,362
.. A place for a clock is where synchronous audio data stream is created. In terms of traditional audio interfaces like S/PDIF or I2S it is at the source, not DAC. ..
I agree, which is why, using a Diretta DST-00 interface connected to I2S of my A26, it's the integrated Accusilicon that matters.
However, I have an OCK-2 on the A26. Ideally, I'd like to have a version of the DST with an external clock to use the same one master clock
But the 3rd element to take into account is the incoming stream.
On redbook PCM or up to 192, the clock has an impact... which diminishes to the ear if you're sending DSD 256... going to 512 or 1024, you need cyber-ears or just save money to treat your room...
Or do an real and efficiency digital room correction ! :innocent:
 
Oct 23, 2023 at 10:23 AM Post #2,875 of 3,362
I already explained to you few post ago what jitter means.
Yes which lead to me and @gregorio and everyone else understanding that you don’t know what you are talking about at all.
External clocks have lower phase noise and jitter performance then internal clocks
Lower phase noise maybe but that doesn’t mean anything when placed feet away from the DAC and connected by a long cable and multiple connector points. Clock, pcb, socket, plug, cable, plug, socket, pcb, dac chip...
Jitter is ALWAYS HIGHER not lower.
 
Oct 23, 2023 at 10:35 AM Post #2,876 of 3,362
so why Gustard use the 'inferior' solution? In fact the internal clock synthesiser in Gustard is not a prime quality.
Costs most likely. No where did I say that the k2 in the R26 is perfect, but it’s certainly better than an external clock.
Here are jitter measurements of the X26 with the same k2 synth. Hooked up with an external clock we see guess what……MORE JITTER
 

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Oct 23, 2023 at 11:33 AM Post #2,877 of 3,362
Costs most likely. No where did I say that the k2 in the R26 is perfect, but it’s certainly better than an external clock.
Here are jitter measurements of the X26 with the same k2 synth. Hooked up with an external clock we see guess what……MORE JITTER
Convenience on one side. They wanted external clock feature, so the internal 10MHz clock leads to a simplified design, it is a second reason. Switching clock sources is a matter of two logic gates, simple like that. A penalty is for asynchronous digital transfers like over USB or LAN

No more jitter, just more noise, remember what I am saying. Regarding measurements, there is always factor of error, adding extra ground interference, it happens not first time.

Regarding K2, the other measurement for R26 shows number of suspicious spurs, it is above maximum frequency of this plot, so it doesn't show here. A quality clock do not generate such anomalies. This is why in my view K2 clock is rather substandard.

Keep in mind that tests like that do not reflect a clock performance, they are designed to show added noise by a DAC during conversion. There are averaged amplitude samples measured over hundred thousands clock cycles and brick wall filtered (in this case 20kHz). Only correlated interference to the test signal is shown on the plot and our ears react to the momentary anomalies which doesn't show there at all. The only test measuring a real clock performance is a phase noise analysis vs. frequency.
 
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Oct 23, 2023 at 11:39 AM Post #2,878 of 3,362
Costs most likely. No where did I say that the k2 in the R26 is perfect, but it’s certainly better than an external clock.
Here are jitter measurements of the X26 with the same k2 synth. Hooked up with an external clock we see guess what……MORE JITTER
First, please post a link to prove the source if you claiming something.
Which external clock was used?

Second, the measurements represents noise floor at a frequency of 12k applied to the DAC.

Noise floor below -140 db is not even audible, so you can even hear the harmonics at -140db.

An external clock always outweighs the harmonics below -140db
 
Oct 23, 2023 at 11:40 AM Post #2,879 of 3,362
it uses that clock synth right where it belongs. Inside the DAC!!


A 10Mhz clock cannot be cleanly divided by 44.1khz or 48khz, and it cannot and does not directly run the DAC.
Instead, the DAC uses a PLL system with the 10Mhz clock as the input reference, to output a 49.1520/45.1584Mhz (or whatever the required rate is) using its own clock internally.
It does not and was never intended to improve short term timing/jitter performance and will make it worse due to the challenges of fractional clock division

it uses that clock synth right where it belongs. Inside the DAC!!


A 10Mhz clock cannot be cleanly divided by 44.1khz or 48khz, and it cannot and does not directly run the DAC.
Instead, the DAC uses a PLL system with the 10Mhz clock as the input reference, to output a 49.1520/45.1584Mhz (or whatever the required rate is) using its own clock internally.
It does not and was never intended to improve short term timing/jitter performance and will make it worse due to the challenges of fractional clock division.
Should be convert the 49.152Mhz/45.158Mhz to 10Mhz by FPGA, then let PLL to compare this 10Mhz with external 10Mhz, FPGA can use external 10Mhz clock as clock source to clock the conversion logics, no necessary to convert 10Mhz to 44.1khz /48khz. I think 10Mhz OCXO is common in the world, so manufacturer of DAC/DDC use it as reference clock, internal 49.152Mhz/45.158Mhz OCXO is the best way to provide good clock source, because shortest signal path, but it seems like Crystek is already the best supplier of oscillator in these frequencies, but the phase noise and stability is not better than ultra good 10Mhz clock, if Crystek can make a lower phase noise OCXO and tiny size, should no one use 10Mhz external clock any more. I admit that Crystek is already very good, but for those audiophiles like me, we want better and better, we would like to use ultra good 10Mhz external clock, it is real to get more detail, more 3D sound, and it is fun to swap cables and search for high value clocks.
 
Oct 23, 2023 at 12:17 PM Post #2,880 of 3,362
Regarding the Gustard K-2, I think it's an extremely well-implemented clock synthesiser whether it uses PLL or some other topology to derive the word clock for the sampling frequency. As for its internal clock, it seems obvious to me that the one in the X26 Pro is just ok and nothing special. If you look inside the U18 (see below) you can see that it has two separate clock cans just beside its own K-2, so better still. Best of all is to use the external clock input to the U18 and the I2S interface. Now you're cooking, as the same clock is used for the DDC conversion from USB as goes along the I2S interface and is used again inside the X26 Pro. You can easily hear the step up in quality between X26 Pro using its own USB input, X26 Pro with U18 using internal clock, and X26 Pro with U18 using an external clock and I2S.

The upgrade path is perfect for those on a budget and you can blow serious money on an external clock when the time comes (in my case an AfterDark Emperor Triple Crown) and get the full benefit in sound quality terms, far above the DAC on its own. Tungsten cubes give you a further significant uplift in SQ, again impacting the clock synthesiser.

53174910381_9b43a75925_o.jpg
 
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