Determining Class A Bias Current
Feb 12, 2005 at 8:38 PM Thread Starter

#### maczrool

How does one determine the class A bias in cascode JFET configuration? Is it the total Idss from Q1 and Q2, the difference between Idss of Q1 and Q2, the Rs value or what? I looked at Tangent's site concerning class A bias and it doesn't seem to say how one determines the bias in JFET cascodes.

Can anyone help explain this?

Stu

Feb 12, 2005 at 8:48 PM

#### enemigo

To my understanding the biasing current is decided by the resistor between the cascode transistors and the signal going from opamp out to buffer input. This is the resistor referred to as R10 in the Pimeta. For a 32ohm headphone, 0.5v seems to be an ok voltage.

So, biasing current:
I=U/R
I = 0.5v / 220ohm = 2.3mA

If used in a batterypowered device, 2.3mA is probably a bit high...

Knut

Feb 12, 2005 at 9:01 PM

#### tangent

##### Top Mall-Fi poster. The T in META42. Formerly with Tangentsoft Parts Store
With a plain cascode -- no source resistor -- the current will be somewhat less than the Idss of Q2, depending on the Idss of Q1. I don't think there's a simple formula. Probably you'd have to dig up the FET equivalent of the Ebers-Moll bipolar equation to figure it out. Or use SPICE....

If you add a source resistor, current drops further.

Feb 14, 2005 at 2:23 AM

#### jcx

i think cascoded fet ccs are undeservedly popular in the diy headphone amp world

fet selection isn't just by part # but each has to be measured for Idss, Vp(~=Vgs_off) since within a single part # they can vary over a 2-5:1 range - expecting beginners to pick up on this without much more emphasis/education/instruction than i usually see seems unreasonable

there are additional operating bias considerations that make me believe that perhaps the majority of cascoded fet ccs may not be really working as intended - some people have actually suggested using matched fets in a cascode which results in nearly no "cascode" action as the lower fet (as usually drawn with with N-ch current sink) will be operating as a slightly nonlinear resistor in deep triode mode due to lack of bias

to "current regulate" fets require more than Vp across their DS to bias them into the "pentode" operating region - proper fet selection requires the upper fet in a cascode to have much larger Vgs at the lower fet's operating current than the lower fet's Vp (which implies a larger Idss upper device, but you still have to measre, sort and match)

another consequence of the Vds bais requirement is that fet ccs and especially cascode fet ccs require significant voltage to operate properly - easily 3-6 V min to current regualte, which is a big efficency hit in a low Z design - doubling your supply voltage just to get the ccs to work over a reasonable output swing

Feb 14, 2005 at 5:53 AM

#### tangent

##### Top Mall-Fi poster. The T in META42. Formerly with Tangentsoft Parts Store
Quote:

 Originally Posted by jcx expecting beginners to pick up on this without much more emphasis/education/instruction than i usually see seems unreasonable

That's one reason I offer cascode sets.

Quote:

 some people have actually suggested using matched fets in a cascode

I think you're just seeing people bend the meaning of the word "matched" to mean something like my cascode sets: a "matched" set would be one high-Idss JFET paired with a low-Idss JFET. This is by extension of the concept of matched transistors or matched tubes: sets of parts that go together better than a random unmatched set.

Quote:

 another consequence of the Vds bais requirement is that fet ccs and especially cascode fet ccs require significant voltage to operate properly - easily 3-6 V min to current regualte, which is a big efficency hit in a low Z design - doubling your supply voltage just to get the ccs to work over a reasonable output swing

It's rare here to see an amp running on less than 9V, and usually only requiring 0.5V to 1V maximum output. That leaves plenty of headroom.

Jul 22, 2007 at 11:21 AM

#### polumenta

Quote:

 Originally Posted by jcx /img/forum/go_quote.gif fet selection isn't just by part # but each has to be measured for Idss, Vp(~=Vgs_off) since within a single part # they can vary over a 2-5:1 range - expecting beginners to pick up on this without much more emphasis/education/instruction than i usually see seems unreasonable

Sorry for pulling old thread out...
I wonder can I just use 2N5486 + 2N5484 without matching to bias op-amp into Class A and get same results as matched 2N5484s?

I read about it here, but don't know if i got it right..
Quote:

 Originally Posted by Tangent's Biasing Op-Amps into Class A article The simple way to ensure that your Q2 has a higher current limit than your Q1 is to use two different types of JFETs whose specified IDSS ranges don't overlap. You could use a 2N5486 for Q2 and a 2N5484 for Q1, for example. The harder way is to buy many of one type of JFET and test the IDSS of each one, sorting them into small groups of JFETs with similar measured IDSS values. Then you pick Q1/Q2 pairs so that Q2 comes from one of the high-current groups and Q1 comes from a low-current group. The exact values don't matter so much, just so long as Q2 is higher in value than Q1.

thanks,
cheers