dude_500
100+ Head-Fier
- Joined
- Nov 16, 2008
- Posts
- 467
- Likes
- 38
Put together this schematic this morning since I was bored. It is an I-V stage with no signal capacitors.
T2 forms a 5mA current source, which sums with I_in into T1. T2 is present to provide some bias current to help stabilize the voltage seen at the input thus decreasing the input resistance. T1 is a current tunnel down to R4, which performs the I-V conversion. This feeds into V1A cathode (which was originally planned to be a 12AX7, but the gain is way too high so I'll probably want to find some tube with lower gain). T3 forms a plate load which will end up being a few milliamps, which will be set based on what tube I end up using. R13 and R14 form an LPF, the op-amp is the active element of the DC servo amplifying the offset voltage. The voltage output is converted to current through R12, and T4 tunnels this down to R10 to bias the grid.
Any thoughts on this? It seems to simulate very well, although I don't have a lot of analog design experience.
![](https://www.head-fi.org/attachments/648557/)
T2 forms a 5mA current source, which sums with I_in into T1. T2 is present to provide some bias current to help stabilize the voltage seen at the input thus decreasing the input resistance. T1 is a current tunnel down to R4, which performs the I-V conversion. This feeds into V1A cathode (which was originally planned to be a 12AX7, but the gain is way too high so I'll probably want to find some tube with lower gain). T3 forms a plate load which will end up being a few milliamps, which will be set based on what tube I end up using. R13 and R14 form an LPF, the op-amp is the active element of the DC servo amplifying the offset voltage. The voltage output is converted to current through R12, and T4 tunnels this down to R10 to bias the grid.
Any thoughts on this? It seems to simulate very well, although I don't have a lot of analog design experience.