[tangent]

Yes, good suggestions.

Speaking of C4, another item on the wishlist is that the cap shouldn't span the output resistor. I was only thinking of schematic prettiness when I did it that way. It's clearly wrong.

 

[diditmyself]

Quote:

Originally Posted by tangent /img/forum/go_quote.gif Yes, I'm aware of the high resistor value problem in the Cranky Op-Amps article. I welcome suggestions for alternate configurations that still meet all the requirements. The main thing is low DC offset with high Iib op-amps even accounting for the variable +IN resistance due to the pot. If you leave the pot out, it's easy to get the behavior you want with low resistor values.

I think this is an elegant way to balance the input currents (R3 could be a resistor and a pot in series):

I'm sorry if the zobel network on the output is confusing. It has nothing to do with balancing the bias currents. It's the JFET on the input that does the job. Since LM6171 is supposed to be cranky, I added it for increased stability with capacitive loads.

A buffer in front of the opamp is another option:

A compromise. I think most sources has low enough output impedance for those values. A drawback is that the input impedance will vary with the volume setting.

 

[diditmyself]

... and this is why I don't like those high resistor values:

Noise is 10x higher

vs that of the 1:st schematic above

The frequency response looks like this

vs this

 

[diditmyself]

... and finally pulse response

The little peak is beacuse of the zobel.

 

[TzeYang]

god, either my line hates me or I cant see any of the pictures/attached thumbnails diditmyself posted

 

[diditmyself]

Quote:

Originally Posted by TzeYang /img/forum/go_quote.gif god, either my line hates me or I cant see any of the pictures/attached thumbnails diditmyself posted

The images is very visible both at home and at work. It must be your internet provider.