FS2
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- Dec 18, 2007
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I've been planning out a AD1955 DAC for a while now, and one thing I was toying with is adding a SRC4192 onto the board, which would lead to using an oscillator as the Mclk source. Now on page 13 of the AD1955 datasheet it lists 128xfs and 192xfs as allowable Mclk frequencies at a fs of 192 kHz. That works out to 24.576 MHz and 36.864MHz, the former being a very familiar number...
The thing is, on page 4 it lists the minimum timing for the master clock period as 50 ns, which corresponds to a frequency of only 20 MHz... If that's the minimum allowable period for the Mclk signal then I don't understand how 128x192 kHz could be allowed. Did I miss something?
The thing is, on page 4 it lists the minimum timing for the master clock period as 50 ns, which corresponds to a frequency of only 20 MHz... If that's the minimum allowable period for the Mclk signal then I don't understand how 128x192 kHz could be allowed. Did I miss something?