I don't think this can be literally true. The DAC1 was set, if I recall correctly, to do something called asynchronous sample rate conversion (ASRC) as an anti-jitter measure. Sample rate conversion (plus the accompanying necessary anti-alias filtering) is mathematically not a bit-perfect process. Nor, for that matter, is conversion from digital to analog or the reverse. These processes are also technically "lossy," meaning once the data have been converted, there is no mathematical process for perfectly reconstructing them. So parts from the ADC1 and DAC1 may have been tested, or a testing configuration different than the consumer unit (without ASRC) may have been used, or a test may have been run where the results were audibly indistinguishable from analog input, but I do not think the circumstances as presented - a full ADC and full DAC, each doing sample rate and digital-analog/analog-digital conversion - could mathematically obtain the same data stream as input.