Filburt
Headphoneus Supremus
- Joined
- Jun 23, 2005
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Quote:
Ah, okay. I thought it might be this. Thanks for the helpful reply!
One last question: is that what is raising the noise floor so much? That is, the use of very large value resistors when C1 is installed? The discussion here leads me to believe that this is the case.
Originally Posted by amb It's because we want to keep the combined resistances at the + input and - input to be close to each other for the lowest DC offset. When C1 is installed, the resistance on the + input is the value of R2 (100KΩ). To keep the - input side at 100KΩ you will need very high values of R3 and R4 (the parallel value of these, e.g., 120KΩ || 620KΩ ~= 100KΩ). |
Ah, okay. I thought it might be this. Thanks for the helpful reply!
One last question: is that what is raising the noise floor so much? That is, the use of very large value resistors when C1 is installed? The discussion here leads me to believe that this is the case.