sajunky
Headphoneus Supremus
Embedded clock on the S/PDIF or AES connection is jittery by a nature. If you don't synchronise with an external clock, an advantage of ultra stable DDC clock is a minimal. A difference in clock stability between DDC devices are tarnishing in result. The only benefit comes from ground loops protection: better protection, better sound. R2R DACs are very sensitive to ground loops. DI-20HE will still show an advantage in this respect, as competitors do not have regenerative power supply, but a final benefit will vary from one system to another. Clock stability relation to the sound quality is more predictable. Mathematically predictable.I was going to use SPDIF or AES. Not I2S... Also, my DAC does NOT support external clock.
Knowing that, do you still believe the DI-20 is superior to Denafrips DDC products? or do you think I will only see an advantage to DI-20 when using I2S?
EDIT: I will add that influence of clock stability on SQ also depends on a DAC PLL parameters. A tight PLL loop will improve internal clock quality, at a risk of losing synchronisation when source clock is not stable enough. It is why in some designs there is a switch for increasing frequency range PLL can achieve a lock on the source. This is on the cost of increased jitter. I don't know whether it is important with modern DDC devices though. It was usefull feature in the past with CD and tape transports.
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