Two things mixed up here I think. First, the overall lower noise achievable with "24 bit" chips is possible because of... higher bit depth, meaning that the number of bits that constitute the package allows for higher dynamic range (from the simple fact that there are 24 of them), that much for theory.
In practice not all the dynamic range is used because, as you mentioned, the overall implementation allows for "only" 14, or 17, or 20 bits of dynamic range as the rest is covered by circuit noise. As far as I remember most modern DAC chips present in mainstream stuff (like wm8740 and higher, es9023 and higher, and other TI and Cirrus chips) easily achieve noise performance below -96 dB, so no worries here.
If you have a 16 bit DAC chip and you want to max the dynamic range out, then even if the noise or distortion artifacts inherent to the chip itself are at, say, -80 dB, then -110 dB noise everywhere else means that the noise or distortion of the chip will be overall increased only by a tiny tiny amount when measured input to output (full circuit not only the chip itself), as these artifacts sum up, not mask each other, the question is what is the limiting factor in a given design and how can we minimise any additional distortion.