Originally Posted by 00940
On what basis should I trust you ? Have you any jitter measurements lying around to back up your point ? "By far" is quite a statement...
On the basis that I probably know more than you?
Joking aside, I have aquired jitter measurements on the WM8804 from the good people at Wolfson. I do not believe they would appreciate if I share these however, you will have to email them and ask for yourself.
I will try to explain what makes the WM8804 different from almost every other SPDIF reciever out there.
The DIR9001 uses PLL to lock on to the incoming signal, a fairly standard PLL at that. This is the same methods as used by most other SPDIF recievers, including the CS8416. I will not go into how a PLL works, you have to read up on this yourself. The DIR9001 have an intrinsic jitter of 50 ps. That is, when it is fed a perfectly clean and jitter free signal, the output will have some 50 ps of jitter added by the PLL.
In reality however the input signal is never clean and jitter free. Quite the opposite in fact, several nanoseconds of jitter are quite common. The PLL will try to keep lock on the signal, constantly making small adjustments to the VCO. Regardless of how good the PLL is, a certain amount of jitter from the input signal will make it's way to the output. The lower the amount, the better the jitter rejection of the reciever. For example, under normal circumstances the DIR9001 might have some 200 ps of jitter.
The WM8804 is different. Rather than using an normal PLL, it uses a fractional-N PLL locked on to an external crystal. The speed of this PLL is adjusted by a second, digital control loop which then recovers the data. This offers far superior jitter rejection. So good in fact that unless the PLL looses lock, the output jitter will be almost indistinguishable from the intrinsic jitter of the PLL.