audiophile diy DAP? - Page 6

Alright, I did a bit more research with the USB controller. If we want host capabilities (eventually, I don't mean in the first version of the software), we should probably try the ISP1761--according to its datasheet, the peripheral capabilities on the chip are the same as the ISP1582. The ISP1582 would need more work than a simple usb-to-ata bridge, but rockbox supports a player with that chipset so there's some example code to build on.

Or if we want to completely drop host capabilities from the first revision of the hardware, we can try looking at cypress' usb-to-ata bridges. Looking into their site, they've actually got a couple of more different models; I'm about to go to sleep now, but you'll want to look into the CY7C68301C, CY7C68320C, and CY7C68321C. They might not work, as I've just glanced at their specs so far. If someone wants to do some hunting, find a distributor that stocks CY7C68300C in reasonable multiples.

Argh, actually I did a quick digikey search and none of them are stocked by digikey and have a minimum quantity of at least 200 or so. Unless someone can find a good source, I think we're going to end up going for the ISP1761. A bit more work at first, but at least we'll be able to do usb host in the future.

All of the ones you mentioned are essentially the same. The best I have been able to find is the CY7C68300B which has a minimum quantity of 56 from Digi-Key.

The ISP1582 is probably your safest bet however. It is cheap and will not go obsolete for a long, long time. It's not too difficult to create a mass storage device.

it's still an audiophile project isn't it?

unfortunately i dont have much to contribute on the technical side
but
I think the development focus should be put on the digital out with the minimum goal of a DIYable DAP with multiplexd digi out up to atleast 24/96 ?
Wouldn't that mean a buffer and nice clock needs to be added ?
What about the SDPIF transmitter ICs are they worth feeding a lowjitter clocksignal and can those integrated linedrivers be used?


sofar
2,5" HDD as storage
wav decoding
I²S output to
(so that's all done by that MCF 525??)

(AK4115 AK4103 CS8406 DIT4096 anything else out there?)

I'll do another thread for the audio section. The first version of the firmware indeed will probably be something really simple, maybe just a WAV decoder. If it turns out to be not too difficult, there is a possibility that FLAC decoding will also be in the first version, or maybe even rockbox. Since this will be programmable by replacing a firmware file on the hard drive (or possibly some other means), we can easily release a more advanced firmware for the DAP later on without any modification to the hardware.

I take a close look to the evaluation board M5249C3 and the Audio daughter board.

I have done a list of the main components not the resistor, connector, jumper, capacitor...


M5249C3 evaluation board

*Audio Interfaces
U19: AK4360: 20-bit DAC with built-in headphone amplifier
U1: AK5353vt : 96kHz 24BIT ADC WITH SInGLE-ENDED INPUT

*M5249
U2: ColdFire MCF5249
*10/100baseT Ethernet Port & Magnetics
U4 : SMSC LAN91C111-NE: 10/100 Non-PCI Ethernet Controller with Coldfire supports
T1 : HALO TG110-S050N5 or N2 : 10/100 High Speed LAN Magnetics Isolation Modules
U5 : ispGAL22LV; lattice SPLD Programmable Logic Devices

*Flash & SDRAM memory
U6 : AM29LV160DB90EC 1Mx16bit AMD Flash memory
U7 : K4S641633D 4Mx16bit SAMSUNG SDRAM memory

*Power Supply, Reset & Clock Oscillator
U18: TLC7733ID TI Supervisory Circuits 2.93V
U9 : MAX6355LSUT-T Maxim Triple-Voltage µP Supervisory Circuits
U10 :NC7SZU04: Fairchild single unbuffered inverter
U11 LM2596S-3.3 National Semiconductor Power Converter
U8 : LT1086CM Linear Technology 1.5A Low Dropout Positive Regulators

*RS232 Serial, I2C & QSPI Interfaces
U13: MAX3225CAP : RS232 Transceiver.
U14: MAX3225CAP : RS232 Transceiver.

*IDE Interface
U16: MC74LCX16245DT : Motorala Low-Voltage CMOS 16-Bit Transceiver
U17: MC74LCX16245DT : Motorala Low-Voltage CMOS 16-Bit Transceiver

Audio Daughter Board
*Audio: (dac and amp)
T1: TTWB1010 : Surface Mount Wideband RF Transformer
T2: TTWB1010 : Surface Mount Wideband RF Transformer
U7A: Hex inverter
U7B: Hex inverter
U7C: Hex inverter
U7D: Hex inverter
U7E: Hex inverter
U7F: Hex inverter
DCDC1 : NMA0512S : single-in-line package DC/DC Converters 5v/12v
U4: OPA2134/SO : Op amp
U6: OPA2134/SO : Op amp
U10: GP1FA550TZ : Fiber Optic Transmitter-Receiver
U8: GP1FA550RZ : Fiber Optic Transmitter-Receiver
U3: AK4393 : 96khz 24 bit Dac
U5: AK4393 : 96khz 24 bit Dac

*Flash Media Interface (simple)
J9 : FPS009-2203-10 : SD Card and MMC Reader
J10 : Memory Stick

*Trio interface (it contains lcd and switches to navigate inside the data)
LCD1: PSG7955AW-SGR :Palm Technology lcd module
U9 : LM339d : QUAD DIFFERENTIAL COMPARATORS

*USB Interface
u1 :ISP1362 :Single-chip Universal Serial Bus On-The-Go controller
U2: MIC2026 : Dual-Channel Power Distribution Switch

*CD Interface Adapters
Connector only


Software Features
• Audio CD playback
• MP3 playback (MPEG-1 Layer 3 and MPEG-2 Layer 3 with lower sampling rates)
• WMA playback (high rate, mid rate and low rate)
• WAV file playback (16- or 8- bit linear samples; sampling rates supported same as for MP3 and
WMA)
• CD-DA, CD-R, CD-RW and CD-ROM discs
• 12 cm discs
• ISO-9660 Level 3 file system with Joliet extension
• ISO-9660 Joliet format for Macintosh
• UDF file system, version 1.5, with fixed and variable packets
• Multi-session discs (up to five sessions)
• Mixed discs (data and audio tracks)
• Copy-protected CD-DA discs
• Display of ID3 tags V1.1, V2.2, V2.3, V2.4
• Disc start-up retry (for open discs and discs with errors)
• Servo switch-off after filling up internal buffer
• Basic player controls
— Play/Pause/Stop
— Next track/Previous track
— Fast forward/Rewind
— Digital Volume Control
— Hold (disable keypad)
• Track/File programming
• Flat/Hierarchical/Collapsible file system browsing
• Playlist
• Shuffle
• Repeat (None/One/All/AB)
• Pre-set 5-Band Graphical Equalizer (Flat/Rock/Classic/Jazz/Ultra bass modes)
• User Definable 5-Band Graphic Equalizer
• ESA, with 4X ADPCM compression
• Intro-Scan
• Lid Open/Close detect, with player stop on Lid Open
• Booting from Flash memory
• Last three file systems stored during power-down in flash memory for quick start-up
• Resume on power-up with previous settings and playing position
• Software update from CD
• Additional displays through Menu
— Hold/Resume setting
— Decoder Information (type, sampling rate, bit rate)
— Time (Elapsed/Remaining time for current track)
— ID3 and WMA tags display of artist, title, album, genre and year
• Configurable SSC (sub-code and sector controller) and BFM (buffer and file management)
• Easy to add new decoders (e.g., Ogg Vorbis, MP3Pro) and additional audio post processing (e.g.,
SRS WOW, QSound Sizzle)

Thanks, I'll look into the evaluation board--might be useful to look at for our design. IIRC, the decoders/firmware from freescale require an agreement to download, and they wouldn't approve me. That was over a year ago that I was researching this, though, so things might have changed. I'm checking right now.

[edit> yeah, it appears they still need to do some agreement thing with an authorized dealer. forget it.

BTW, I've split the audio hardware design section to another thread. Post any opinions you have on the DACs, SPDIF and such overthere.

The Dap structure will not be far from the evaluation board/daughter board. We just need to clean it up and find some alternative chips.


Uclinux can run on the M5249C3. http://www.uclinux.org/ports/coldfire/faq.html

The ISP1362 has been tested with MCF5249, SCF5249 and SCF5250. The host function is usefull if you want to connect a Portable player to the Dap without the need of a PC.
Digikey sell the ISP1362 at $7,10.

The only thing with the ISP1362 is that it's not high-speed capable (so it's limited to 12mbps or so, iirc). It's going to be painfully slow transferring music onto the DAP.

I was reading through the datasheet for the SCF5250 when I came across the following:

I do not believe an external EEPROM is needed.

Yep I just saw that too. I'm going to see if I can get the IDE bootloader to work--documentation doesn't seem too clear to me. I might see if freescale will provide sample code for the ide bootloader, since there's almost no documentation on their site on it other than one or two pages in the datasheet.

The datasheet for the SCF5250 contains only information specific to the SCF5250. General information on the ColdFire core can be found in the ColdFire User's Manual.

You might also want to take a look at the ColdFire Programmer's Reference Manual.

darn, I knew I'd leave something out when I requested the manuals!

heads up: freescale offers free print-based documentation through http://www2.hibbertgroup.com/freesca...HomeController . Personally I can't stand reading manuals online, so I've requested most of the scf5250 documentation already. I'm not sure if they'll ship outside of the US, unfortunately.


hey, whoever was thinking about using uclinux:
http://www.freescale.com/files/micro...85.pdf?fsrch=1
freescale's got their own app note for it. I don't have the eval board, but it sounds like it wouldn't be as difficult as i'd thought to implement it.

I thnk the first step is to build your own prototype (the 5249 evaluation board is more than $1000).

arggggh! can't believe I didn't read this earlier. I've gone through most of the scf5250 reference manual, and it seems that the audio outputs (both SPDIF and I2S) are only capable of 20-bit. Personally I don't think 20-bit and 24-bit have much of a difference (iirc the noise floor of almost all systems is higher than what 24-bit can resolve), but it would have been better if it were 24-bit.

Although I've already gone somewhat far into the design, I'm still open to any suggestions for another microcontroller. If anyone knows of any I2S interface IC, I'd be interested too. I'd rather not have to put a programmable logic device to do that. I've also been thinking about multiplexing two of the I2S outputs and using a cheap uC or preferably some digital logic to take care of putting the signal back together, but I'm probably just asking for trouble with that. Adapting SPI might also be a possibility, though I think it might take too much processor time. Most likely I'll end up sticking to 20-bit.

The I2S protocol is not as complicated as you think. All you need to make an interface is three shift registers, a counter and an AND gate. Let me know if you need a schematic.

I would use a CPLD however, they are not as bad as you think. You can find a couple of ready made I2S interfaces over at OpenCores, or you can make your own.