No reason. We focused more on the overall design, and not so much on the implementation. Caps across the cascoding LEDs would probably help with distortion at high frequencies, and putting a cap between the current mirror's bases and their respective power rails would probably help prevent oscillation.
I recommend you take your queues from Malcolm's paper about where to add capacitors, and of course determine WHY the capacitor is there and what the impedences are in the surrounding circuit so you can choose values appropriately. I never did build this thing ("life" stepped in and has kept me busy since :-/ ) so I would be curious to hear how to do.
I guess the main thing I am sweating before finalizing my drawing is base current cancellation. I don't think it can be ignored totally. For example, the current in T7 will tend to be about 98% of the current in T2 (assuming hfe = 400), which will contribute to the impedance seen by the DAC.
Then there's the problem that the current at T17's collector is +Idac - 7 * Ib, but the current at the collector of T18 is -Idac - 9 * Ib. The output will swing more on the low side than the high side, causing a substantial gain error of a whopping 4%. If I'm trying to realize a 140dB SNR, this is a major problem
So I think I need to put more thought into base current cancellation and/or making the circuit a bit more symmetric.